DS90LV018A_05 Datasheet, PDF (3/9 Pages) National Semiconductor (TI) – 3V LVDS Single CMOS Differential Line Receiver

Switching Characteristics (Continued)
Note 10: t_SKD4, part to part skew, is the differential channel-to-channel skew of any event between devices. This specification applies to devices over the
recommended operating temperature and voltage ranges, and across process distribution. t_SKD4 is defined as |Max − Min| differential propagation delay.
Note 11: V_CC is always higher than R_IN+ and R_IN− voltage. R_IN+ and R_IN− are allowed to have voltage range −0.05V to +3.05V. V_ID is not allowed to be greater
than 100 mV when V_CM = 0V or 3V.
Note 12: f_MAX generator input conditions: t_r = t_f < 1 ns (0% to 100%), 50% duty cycle, differential (1.05V to 1.35V peak to peak). Output criteria: 60%/40% duty
cycle, V_OL (max 0.4V), V_OH (min 2.7V), load = 15 pF (stray plus probes).
Parameter Measurement Information
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FIGURE 1. Receiver Propagation Delay and Transition Time Test Circuit
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FIGURE 2. Receiver Propagation Delay and Transition Time Waveforms
Typical Application
Balanced System
FIGURE 3. Point-to-Point Application
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Applications Information
General application guidelines and hints for LVDS drivers
and receivers may be found in the following application
notes: LVDS Owner’s Manual (lit #550062-001), AN808,
AN1035, AN977, AN971, AN916, AN805, AN903.
LVDS drivers and receivers are intended to be primarily used
in an uncomplicated point-to-point configuration as is shown
in Figure 3. This configuration provides a clean signaling
environment for the fast edge rates of the drivers. The re-
ceiver is connected to the driver through a balanced media
which may be a standard twisted pair cable, a parallel pair
cable, or simply PCB traces. Typically the characteristic
impedance of the media is in the range of 100Ω. A termina-
tion resistor of 100Ω should be selected to match the media,
and is located as close to the receiver input pins as possible.
The termination resistor converts the driver output (current
mode) into a voltage that is detected by the receiver. Other
configurations are possible such as a multi-receiver configu-
ration, but the effects of a mid-stream connector(s), cable
stub(s), and other impedance discontinuities as well as
ground shifting, noise margin limits, and total termination
loading must be taken into account.
The DS90LV018A differential line receiver is capable of de-
tecting signals as low as 100 mV, over a ±1V common-mode
range centered around +1.2V. This is related to the driver
3
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