DS90LV011AQ Datasheet, PDF (3/6 Pages) National Semiconductor (TI) – Automotive LVDS Differential Driver

Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.
Note 2: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except V_OD.
Note 3: All typicals are given for: V_DD = +3.3V and T_A = +25°C.
Note 4: Output short circuit current (I_OS) is specified as magnitude only, minus sign indicates direction only.
Note 5: These parameters are guaranteed by design. The limits are based on statistical analysis of the device performance over PVT (process, voltage,
temperature) ranges.
Note 6: C_L includes probe and fixture capacitance.
Note 7: Generator waveform for all tests unless otherwise specified: f = 1 MHz, Z_O = 50Ω, t_r ≤ 1 ns, t_f ≤ 1 ns (10%-90%).
Note 8: The DS90LV011AQ is a current mode device and only function with datasheet specification when a resistive load is applied to the drivers outputs.
Note 9: t_SKD1, |t_PHLD − t_PLHD|, is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of
the same channel.
Note 10: t_SKD3, Differential Part to Part Skew, is defined as the difference between the minimum and maximum specified differential propagation delays. This
specification applies to devices at the same V_DD and within 5°C of each other within the operating temperature range.
Note 11: t_SKD4, part to part skew, is the differential channel to channel skew of any event between devices. This specification applies to devices over recommended
operating temperature and voltage ranges, and across process distribution. t_SKD4 is defined as |Max − Min| differential propagation delay.
Note 12: f_MAX generator input conditions: t_r = t_f < 1 ns (0% to 100%), 50% duty cycle, 0V to 3V. Output criteria: duty cycle = 45%/55%, V_OD > 250mV.
Parameter Measurement Information
30063803
FIGURE 1. Differential Driver DC Test Circuit
30063824
FIGURE 2. Differential Driver Full Load DC Test Circuit
30063804
FIGURE 3. Differential Driver Propagation Delay and Transition Time Test Circuit
3
www.national.com