DS90LV001 Datasheet, PDF (3/13 Pages) National Semiconductor (TI) – 3.3V LVDS-LVDS Buffer

AC Electrical Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified. (Note 3)
Symbol
Parameter
Conditions
Min Typ Max Units
t_PHLD
t_PLHD
t_SKD1
t_SKD3
Differential Propagation Delay High to Low
Differential Propagation Delay Low to High
Pulse Skew |t_PLHD − t_PHLD| (Note 5) (Note 6)
Part to Part Skew (Note 5) (Note 7)
R_L = 100Ω, C_L = 5pF
Figure 3 and Figure 4
1.0 1.4 2.0 ns
1.0 1.4 2.0 ns
20 200 ps
0
60 ps
t_SKD4 Part to Part Skew (Note 5) (Note 8)
400 ps
t_LHT
Rise Time (Note 5)
R_L = 100Ω, C_L = 5pF
200 320 450 ps
t_HLT
Fall Time (Note 5)
Figure 3 and Figure 5
200 310 450 ps
t_PHZ
Disable Time (Active High to Z)
R_L = 100Ω, C_L = 5pF
3
25 ns
t_PLZ
Disable Time (Active Low to Z)
Figure 6 and Figure 7
3
25 ns
t_PZH
Enable Time (Z to Active High)
25 45 ns
t_PZL
Enable Time (Z to Active Low)
25 45 ns
t_DJ
LVDS Data Jitter, Deterministic (Peak-to-Peak) V_ID = 300mV; PRBS = 2²³ − 1 data;
(Note 9)
V_CM = 1.2V at 800Mbps (NRZ)
100 135 ps
t_RJ
LVDS Clock Jitter, Random (Note 9)
V_ID = 300mV; V_CM = 1.2V at 400MHz
clock
2.2 3.5 ps
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the device
should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.
Note 2: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except V_OD and ∆V_OD.
Note 3: All typical are given for V_CC = +3.3V and T_A = +25˚C, unless otherwise stated.
Note 4: Output short circuit current (I_OS) is specified as magnitude only, minus sign indicates direction only.
Note 5: The parameters are guaranteed by design. The limits are based on statistical analysis of the device performance over the PVT (process, voltage and
temperature) range.
Note 6: t_SKD1, |t_PLHD − t_PHLD|, is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of
the same channel.
Note 7: t_SKD3, Part to Part Skew, is defined as the difference between the minimum and maximum specified differential propagation delays. This specification
applies to devices at the same V_CC and within 5˚C of each other within the operating temperature range.
Note 8: t_SKD4, Part to Part Skew, is the differential channel-to- channel skew of any event between devices. This specification applies to devices over recommended
operating temperature and voltage ranges, and across process distribution. t_SKD4 is defined as |Max − Min| differential propagation delay.
Note 9: The parameters are guaranteed by design. The limits are based on statistical analysis of the device performance over the PVT range with the following test
equipment setup: HP8133A (pattern pulse generator), 5 feet of RG142B cable with DUT test board and HP83480A (digital scope mainframe) with HP83484A (50GHz
scope module). The HP8133A with RG142B cable exhibit a t_DJ = 21ps and t_RJ = 1.8ps.
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