DS15BR400 Datasheet, PDF (3/11 Pages) National Semiconductor (TI) – 4-Channel LVDS Buffer/Repeater with Pre-Emphasis

Pin Descriptions
Pin
TQFP Pin
LLP Pin
Name
Number
Number
DIFFERENTIAL INPUTS
IN0+
13
9
IN0−
14
10
IN1+
15
11
IN1−
16
12
IN2+
19
13
IN2−
20
14
IN3+
21
15
IN3−
22
16
DIFFERENTIAL OUTPUTS
OUT0+
48
32
OUT0−
47
31
OUT1+
46
30
OUT1−
45
29
OUT2+
42
28
OUT2−
41
27
OUT3+
40
26
OUT3-
39
25
DIGITAL CONTROL INTERFACE
PWDN
12
8
PEM
2
POWER
V_DD
3, 4, 5, 7, 10,
11, 28, 29, 32,
33
GND 8, 9, 17, 18, 23,
24, 37, 38, 43,
44
2
3, 4, 6, 7,
20, 21
5 (Note 1)
N/C
1,6, 25, 26, 27, 1, 17,
30, 31, 34, 35, 18,19,22,
36
23, 24
I/O, Type
Description
I, LVDS Channel 0 inverting and non-inverting differential inputs.
I, LVDS Channel 1 inverting and non-inverting differential inputs.
I, LVDS Channel 2 inverting and non-inverting differential inputs.
I, LVDS Channel 3 inverting and non-inverting differential inputs.
O, LVDS Channel 0 inverting and non-inverting differential outputs. (Note 2)
O, LVDS Channel 1 inverting and non-inverting differential outputs. (Note 2)
O, LVDS Channel 2 inverting and non-inverting differential outputs. (Note 2)
O, LVDS Channel 3 inverting and non-inverting differential outputs. (Note 2)
I, LVTTL
I, LVTTL
A logic low at PWDN activates the hardware power down mode (all
channels).
Pre-emphasis Control Input (affects all Channels)
I, Power V_DD = 3.3V, ±10%
I, Ground
Ground reference for LVDS and CMOS circuitry. For the LLP package, the
DAP is used as the primary GND connection to the device in addition to the
pin numbers listed. The DAP is the exposed metal contact at the bottom of
the LLP-32 package. It should be connected to the ground plane with at
least 4 vias for optimal AC and thermal performance.
No Connect
Note 1: Note that for the LLP package the GND is connected thru the DAP on the back side of the LLP package in addition to the actual pin numbers listed.
Note 2: The LVDS outputs do not support a multidrop (BLVDS) environment. The LVDS output characteristics of the DS15BR400 and DS15BR401 are optimized
for point-to-point backplane and cable applications.
3
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