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CD4541BC Datasheet, PDF (3/6 Pages) Fairchild Semiconductor – Programmable Timer
DC Electrical Characteristics (Note 2) CD4541BC (Continued)
Symbol
Parameter
Conditions
b40 C
a25 C
a85 C Units
Min Max Min Typ Max Min Max
VIH
High Level Input Voltage VDD e 5V VO e 0 5V or 4 5V 3 5
VDD e 10V VO e 1 0V or 9 0V 7 0
VDD e 15V VO e 1 5V or 13 5V 11 0
35
3
70
6
11 0 9
35
V
70
V
11 0
V
IOL
Low Level Output Current VDD e 5V VO e 0 4V
(Note 3)
VDD e 10V VO e 0 5V
VDD e 15V VO e 1 5V
2 32
1 96 3 6
3 18
2 66 9 0
12 4
10 4 34 0
16
mA
2 18
mA
8 50
mA
IOH
High Level Output Current VDD e 5V VO e 2 5V
(Note 3)
VDD e 10V VO e 9 5V
VDD e 15V VO e 13 5V
51
2 69
10 5
4 27 130
2 25 8 0
8 8 30 0
35
mA
1 85
mA
7 22
mA
IIN
Input Current
VDD e 15V VIN e 0V
VDD e 15V VIN e 15V
b0 3
03
b10b5 b0 3
10b5 0 3
b1 0 mA
1 0 mA
AC Electrical Characteristics TA e 25 C CL e 50 pF (refer to test circuits)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
tTLH
Output Rise Time
VDD e 5V
VDD e 10V
VDD e 15V
50
200
ns
30
100
ns
25
80
ns
tTHL
Output Fall Time
VDD e 5V
VDD e 10V
VDD e 15V
50
200
ns
30
100
ns
25
80
ns
tPLH tPHL
Turn-Off Turn-On Propagation Delay
Clock to Q (28 Output)
VDD e 5V
VDD e 10V
VDD e 15V
18
40
ms
06
15
ms
04
10
ms
tPHL tPLH
Turn-On Turn-Off Propagation Delay
Clock to Q (216 Output)
VDD e 5V
VDD e 10V
VDD e 15V
32
80
ms
15
30
ms
10
20
ms
tWH(CL)
Clock Pulse Width
VDD e 5V
400
200
ns
VDD e 10V
200
100
ns
VDD e 15V
150
70
ns
fCL
Clock Pulse Frequency
VDD e 5V
VDD e 10V
VDD e 15V
25
10
MHz
60
30
MHz
85
40
MHz
tWH(R)
MR Pulse Width
VDD e 5V
400
170
ns
VDD e 10V
200
75
ns
VDD e 15V
150
50
ns
CI
Average Input Capacitance
Any Input
50
75
pF
CPD
Power Dissipation Capacitance (Note 4)
100
pF
AC Parameters are guaranteed by DC correlated testing
Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation
Note 2 VSS e 0V unless otherwise specified
Note 3 IOH and IOL are tested one output at a time
Note 4 CPD determines the no load AC power consumption of any CMOS device For complete explanation see 54C 74C family characteristics application note
AN-90
3