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CD4514BM Datasheet, PDF (3/6 Pages) National Semiconductor (TI) – 4-Bit Latched/4-to-16 Line Decoders
DC Electrical Characteristics CD4514BC CD4515BC (Note 2) (Continued)
Symbol
VIL
VIH
IOL
IOH
IIN
Parameter
Low Level
Input Voltage
High Level
Input Voltage
Low Level Output
Current (Note 3)
High Level Output
Current (Note 3)
Input Current
Conditions
lIOl k 1 mA
VDD e 5V VO e 0 5V or 4 5V
VDD e 10V VO e 1 0V or 9 0V
VDD e 15V VO e 1 5V or 13 5V
lIOl k 1 mA
VDD e 5V VO e 0 5V or 4 5V
VDD e 10V VO e 1 0V or 9 0V
VDD e 15V VO e 1 5V or 13 5V
VDD e 5V VO e 0 4V
VDD e 10V VO e 0 5V
VDD e 15V VO e 1 5V
VDD e 5V VO e 4 6V
VDD e 10V VO e 9 5V
VDD e 15V VO e 13 5V
VDD e 15V VIN e 0V
VDD e 15V VIN e 15V
b40 C
Min Max
15
30
40
35
70
11 0
0 52
13
36
b0 52
b1 3
b3 6
b0 3
03
Min
35
70
11 0
0 44
11
30
b0 44
b1 1
b3 0
a25 C
Typ
2 25
4 50
6 75
2 75
5 50
8 25
0 88
2 25
88
b0 88
b2 25
b8 8
b10b5
10b5
Max
15
30
40
b0 3
03
a85 C
Min Max
15
30
40
35
70
11 0
0 36
0 90
24
b0 36
b0 90
b2 4
b1 0
10
Units
V
V
V
V
V
V
mA
mA
mA
mA
mA
mA
mA
mA
AC Electrical Characteristics
All types CL e 50 pF TA e 25 C tr e tf e 20 ns unless otherwise specified
Symbol
Parameter
Conditions
Min
Typ
Max
Units
tTHL tTLH
Transition Times
VDD e 5V
VDD e 10V
VDD e 15V
100
200
ns
50
100
ns
40
80
ns
tPLH tPHL
Propagation Delay Times
VDD e 5V
VDD e 10V
VDD e 15V
550
1100
ns
225
450
ns
150
300
ns
tPLH tPHL
Inhibit Propagation
Delay Times
VDD e 5V
VDD e 10V
VDD e 15V
400
800
ns
150
300
ns
100
200
ns
tSU
Setup Time
VDD e 5V
VDD e 10V
VDD e 15V
125
250
ns
50
100
ns
38
75
ns
tWH
Strobe Pulse Width
VDD e 5V
VDD e 10V
VDD e 15V
175
350
ns
50
100
ns
38
75
ns
CPD
Power Dissipation Capacitance
Per Package (Note 5)
150
pF
CIN
Input Capacitance
Any Input (Note 4)
5
75
pF
AC Parameters are guaranteed by DC correlated testing
Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits The tables of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteris-
tics’’ provide conditions for actual device operation
Note 2 VSS e 0V unless otherwise specified
Note 3 IOH and IOL are tested one output at a time
Note 4 Capacitance is guaranteed by periodic testing
Note 5 CPD determines the no load AC power consumption of any CMOS device For complete explanation see 54C and 74C Family Characteristics application
note AN-90
3