CD4514BM Datasheet, PDF (1/6 Pages) National Semiconductor (TI) – 4-Bit Latched/4-to-16 Line Decoders

February 1988
CD4514BM CD4514BC CD4515BM CD4515BC
4-Bit Latched 4-to-16 Line Decoders
General Description
The CD4514B and CD4515B are 4-to-16 line decoders with
latched inputs implemented with complementary MOS
(CMOS) circuits constructed with N- and P-channel en-
hancement mode transistors These circuits are primarily
used in decoding applications where low power dissipation
and or high noise immunity is required
The CD4514B (output active high option) presents a logical
‘‘1’’ at the selected output whereas the CD4515B presents
a logical ‘‘0’’ at the selected output The input latches are
R – S type flip-flops which hold the last input data presented
prior to the strobe transition from ‘‘1’’ to ‘‘0’’ This input data
is decoded and the corresponding output is activated An
output inhibit line is also available
Features
Y _{Wide supply voltage range}
3 0V to 15V
Y _{High noise immunity}
Y _{Low power TTL}
compatibility
0 45 V_DD (typ )
fan out of 2
driving 74L
Y _{Low quiescent power dissipation}
Y _{Single supply operation}
0 025 mW package
5 0 V_DC
Y _{Input impedance} e ₁₀12_{X typically}
Y _{Plug-in replacement for MC14514 MC14515}
Logic and Connection Diagrams
Dual-In-Line Package
TL F 5994 – 1
Order Number CD4514B or CD4515B
Top View
TL F 5994 – 2
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 5994
RRD-B30M105 Printed in U S A