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| CD4046BC Datasheet, PDF (3/14 Pages) Fairchild Semiconductor – Micropower Phase-Locked Loop | |||
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DC Electrical Characteristics CD4046BC (Note 2)
Symbol
Parameter
Conditions
b40 C
a25 C
a85 C Units
Min Max Min Typ Max Min Max
IDD
Quiescent Device Current Pin 5 e VDD Pin 14 e VDD
Pin 3 9 e VSS
VDD e 5V
VDD e 10V
VDD e 15V
20
0 005 20
150 mA
40
0 01 40
300 mA
80
0 015 80
600 mA
Pin 5 e VDD Pin 14 e Open
Pin 3 9 e VSS
VDD e 5V
VDD e 10V
VDD e 15V
70
530
1500
5
55
20 410
50 1200
205 mA
710 mA
1800 mA
VOL
Low Level Output Voltage VDD e 5V
VDD e 10V
VDD e 15V
0 05
0 0 05
0 05 V
0 05
0 0 05
0 05 V
0 05
0 0 05
0 05 V
VOH
High Level Output Voltage VDD e 5V
VDD e 10V
VDD e 15V
4 95
9 95
14 95
4 95
5
9 95 10
14 95 15
4 95
V
9 95
V
14 95
V
VIL
Low Level Input Voltage VDD e 5V VO e 0 5V or 4 5V
15
Comparator and Signal In VDD e 10V VO e 1V or 9V
30
VDD e 15V VO e 1 5V or 13 5V
40
2 25 1 5
45 30
6 25 4 0
15 V
30 V
40 V
VIH
High Level Input Voltage VDD e 5V VO e 0 5V or 4 5V
35
3 5 2 75
35
V
Comparator and Signal In VDD e 10V VO e 1V or 9V
70
70 55
70
V
VDD e 15V VO e 1 5V or 13 5V 11 0
11 0 8 25
11 0
V
IOL
Low Level Output Current VDD e 5V VO e 0 4V
(Note 4)
VDD e 10V VO e 0 5V
VDD e 15V VO e 1 5V
0 52
0 44 0 88
13
1 1 2 25
36
30 88
0 36
mA
09
mA
24
mA
IOH
High Level Output Current VDD e 5V VO e 4 6V
b0 52
b0 44 b0 88
b0 36
mA
(Note 4)
VDD e 10V VO e 9 5V
b1 3
b1 1 b2 25
b0 9
mA
VDD e 15V VO e 13 5V
b3 6
b3 0 b8 8
b2 4
mA
IIN
Input Current
All Inputs Except Signal Input
VDD e 15V VIN e 0V
VDD e 15V VIN e 15V
b0 3
03
b10b5 b0 3
10b5 0 3
b1 0 mA
1 0 mA
CIN
Input Capacitance
Any Input (Note 3)
75
pF
PT
Total Power Dissipation fo e 10 kHz R1 e 1 MX
R2 e % VCOIN e VDD 2
VDD e 5V
VDD e 10V
VDD e 15V
0 07
mW
06
mW
24
mW
Note 1 ââAbsolute Maximum Ratingsââ are those values beyond which the safety of the device cannot be guaranteed They are not meant to imply that the devices
should be operated at these limits The table of ââRecommended Operating Conditionsââ and ââElectrical Characteristicsââ provides conditions for actual device
operation
Note 2 VSS e 0V unless otherwise specified
Note 3 Capacitance is guaranteed by periodic testing
Note 4 IOH and IOL are tested one output at a time
3
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