CD4002M Datasheet, PDF (3/6 Pages) National Semiconductor (TI) – Dual 4-Input NOR(NAND) Gate

DC Electrical Characteristics CD4002C CD4012C
Limits
Symbol
Parameter
Conditions
b55 C
a25 C
a85 C Units
Min Max Min Typ Max Min Max
I_DD
Quiescent
Device Current
V_DD e 5 0V
V_DD e 10V
05
0 005 0 5
50
0 005 5 0
15 mA
30 mA
P_D
Quiescent Device V_DD e 5 0V
Dissipation Package V_DD e 10V
25
0 025 2 5
50
0 05 50
75 mW
300 mW
V_OL
Output Voltage
Low Level
V_DD e 5 0V V_I e V_DD I_O e 0A
V_DD e 10V V_I e V_DD I_O e 0A
0 05
0 0 05
0 05 V
0 05
0 0 05
0 05 V
V_OH
Output Voltage
V_DD e 5 0V V_I e V_SS I_O e 0A
4 95
4 95 5 0
4 95
V
High Level
V_DD e 10V V_I e V_SS I_O e 0A
9 95
9 95 10
9 95
V
V_NL
Noise Immunity
V_DD e 5 0V V_O ^t 3 6V I_O e 0A
15
1 5 2 25
14
V
(All Inputs)
V_DD e 10V V_O ^t 7 2V I_O e 0A
30
30 45
29
V
V_NH
Noise Immunity
V_DD e 5 0V V_O ^s 0 95V I_O e 0A 1 4
1 5 2 25
15
V
(All Inputs)
V_DD e 10V V_O ^s 2 9V I_O e 0A
29
30 45
30
V
I_DN
Output Drive Current V_DD e 5 0V V_O e 0 4V V_I e V_DD 0 35
N-Channel (4002) V_DD e 10V V_O e 0 5V V_I e V_DD 0 72
(Note 2)
03 10
0 24
mA
06 25
0 48
mA
I_DN
Output Drive Current V_DD e 5 0V V_O e 0 4V V_I e V_DD 0 145
0 12 0 5
0 095
mA
N-Channel (4012) V_DD e 10V V_O e 0 5V V_I e V_DD 0 3
0 25 0 6
02
mA
(Note 2)
I_DP
Output Drive Current V_DD e 5 0V V_O e 2 5V V_I e V_SS b0 35
b0 3 b2 0
b0 24
mA
P-Channel (4002)
V_DD e 10V V_O e 9 5V V_I e V_SS b0 3
b0 25 b1 0
b0 2
mA
(Note 2)
I_DP
Output Drive Current V_DD e 5 0V V_O e 2 5V V_I e V_SS b0 145
b0 12 b0 5
b0 095
mA
P-Channel (4012)
V_DD e 10V V_O e 9 5V V_I e V_SS b0 35
b0 3 b1 2
b0 24
mA
(Note 2)
I_I
Input Current
10
pA
Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation
Note 2 I_DN and I_DP are tested one output at a time
3