CD4002M Datasheet, PDF (1/6 Pages) National Semiconductor (TI) – Dual 4-Input NOR(NAND) Gate

March 1988
CD4002M CD4002C Dual 4-Input NOR Gate
CD4012M CD4012C Dual 4-Input NAND Gate
General Description
These NOR and NAND gates are monolithic complementa-
ry MOS (CMOS) integrated circuits The N- and P-channel
enhancement mode transistors provide a symmetrical cir-
cuit with output swings essentially equal to the supply volt-
age This results in high noise immunity over a wide supply
voltage range No DC power other than that caused by leak-
age current is consumed during static conditions All inputs
are protected against static discharge and latching condi-
tions
Features
Y _{Wide supply voltage range}
Y _{Low power}
Y _{High noise immunity}
3 0V to 15V
10 nW (typ )
0 45 V_DD (typ )
Applications
Y _Automotive
Y _{Data terminals}
Y _{Instrumentation}
Y _{Medical Electronics}
Y _{Alarm system}
Y _{Industrial controls}
Y _{Remote metering}
Y _Computers
Connection Diagrams
CD4002
Dual-In-Line Package
CD4012
Dual-In-Line Package
Top View
TL F 5940 – 1
Order Number CD4002 or CD4012
Top View
TL F 5940 – 2
C1995 National Semiconductor Corporation TL F 5940
RRD-B30M105 Printed in U S A