ADC14071 Datasheet, PDF (3/18 Pages) National Semiconductor (TI) – 14-Bit, 7 MSPS, 380 mW A/D Converter

Pin Descriptions and Equivalent Circuits (Continued)
Pin No.
Symbol
ANALOG I/O
Equivalent Circuit
47
V_REF+ BY
Description
1
V_{REF (MID)} BY
These pins are high impedance reference bypass pins only.
Connect a 0.1µF capacitor from each of these pins the
AGND. DO NOT connect anything else to these pins.
45
V_REF− BY
DIGITAL I/O
11
CLOCK
12
OE
10
PD
36
OR
19-23,
25-29,
32-35
D0–D13
ANALOG POWER
5, 6, 7,
13, 41
V_A
4, 8, 9,
14, 15,
42
AGND
Digital clock input. The range of frequencies for this input is
25 kHz to 8 MHz (typical) with guaranteed performance at 7
MHz. The input is sampled on the rising edge of this input.
OE is the output enable pin that, when low, enables the
TRI-STATE^® data output pins. When this pin is high, the
outputs are in a high impedance state.
PD is the Power Down input pin. When high, this input puts
the converter into the power down mode. When this pin is
low, the converter is in the active mode.
Out of Range pin. A high at this output pin indicates that the
input voltage is either above the reference voltage or is
below ground. When this pin is high, the digital output pins
will indicate a full scale for input voltages above the
reference voltage, or will indicate a zero scale for input
voltages below zero scale.
Digital data output pins that make up the 14-bit conversion
results. D0 is the LSB, while D13 is the MSB of the straight
binary output word.
Positive analog supply pins. These pins should be
connected to a clean, quiet +5V voltage source and
bypassed to AGND with 0.1 µF monolithic capacitors located
within 1 cm of these power pins, and by a 10 µF capacitor.
The ground return for the analog supply. AGND and DGND
should be connected together directly beneath the
ADC14071 package. See Section 5 (Layout and Grounding)
for more details.
3
www.national.com