9602 Datasheet, PDF (3/8 Pages) National Semiconductor (TI) – Dual Retriggerable, Resettable One Shots

Switching Characteristics V_CC e 5V T_A e 25 C (See Section 1 for Test Waveforms and Output Load)
Symbol
Parameter
Conditions
Military
Min
Max
Commercial
Min
Max
Units
t_PLH
Propagation Delay Time Negative Trigger Input
Low-to-High Level Output to True Output
35
40
ns
t_PHL
Propagation Delay Time
High-to-Low Level Output
t_PW(MIN) Minimum True Output
Pulse Width
Minimum Complement
Pulse Width
Negative Trigger Input
To Complement Output
C_L e 15 pF
C_X e 0
R_X e 5 kX
43
48
ns
90
100
ns
100
110
t_PW
Pulse Width
C_STRAY Maximum Allowable Wiring
Capacitance
R_X e 10 kX
3 08 3 76 3 08 3 76
ms
C_X e 1000 pF
Pins 2 14 to
50
GND
50
pF
R_X
External Timing Resistor
5
25
5
50
kX
Logic Diagrams
TL F 6611 – 2
Operating Rules
1 An external resistor (R_X) and external capacitor (C_X) are
required as shown in the Logic Diagram
2 The value of C_X may vary from 0 to any necessary value
available If however the capacitor has leakages ap-
proaching 3 0 mA or if stray capacitance from either ter-
minal to ground is more than 50 pF the timing equations
may not represent the pulse width obtained
3 The output pulse with (t) is defined as follows
(¹
t e K R_XC_X
1a
R_X
for C_X ^l 10³ pF
K 0 34
where
R_X is in kX C_X is in pF
t is in ns
for C_X ^k 10³ pF see Figure 1
for K vs C_X see Figure 6
TL F 6611 – 3
4 If electrolytic type capacitors are to be used the following
three configurations are recommended
A Use with low leakage capacitors
The normal RC configuration can be used predictably
only if the forward capacitor leakage at 5 0V is less
than 3 mA and the inverse capacitor leakage at 1 0V is
less than 5 mA over the operational temperature
range
R k 0 6 R_X (Max)
TL F 6611 – 4
3