THS4501 Datasheet, PDF (25/48 Pages) National Semiconductor (TI) – WIDEBAND, LOW-DISTORTION, FULLY DIFFERENTIAL AMPLIFIERS

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For more detailed information about balance in fully
differential amplifiers, see the application report, Fully
Differential Amplifiers (SLOA054), referenced at the
end of this data sheet.
INTERFACING TO AN ANALOG-TO-DIGITAL
CONVERTER
The THS4500 family of amplifiers are designed
specifically
to
interface
to
today's
highest-performance ADCs. This section highlights
the key concerns when interfacing to an ADC and
provides example interface circuits.
There are several key design concerns when
interfacing to an analog-to-digital converter:
• Terminate the input source properly. In
high-frequency receiver chains, the source that
feeds the fully differential amplifier requires a
specific load impedance (that is, 50 Ω).
• Design a symmetric printed circuit board (PCB)
layout. Even-order distortion products are heavily
influenced by layout, and careful attention to a
symmetric layout minimizes these distortion
products.
• Minimize inductance in power-supply decoupling
traces and components. Poor power-supply
decoupling can have a dramatic effect on circuit
performance. Since the outputs are differential,
differential currents exist in the power-supply pins.
Thus, decoupling capacitors should be placed in a
manner that minimizes the impedance of the
current loop.
• Use separate analog and digital power supplies
and grounds. Noise (bounce) in the power
supplies (created by digital switching currents) can
couple directly into the signal path, and
power-supply noise can create higher distortion
products as well.
• Use care when filtering. While an RC low-pass
filter may be desirable on the output of the
amplifier to filter broadband noise, the excess
loading can negatively impact the amplifier
linearity. Filtering in the feedback path does not
have this effect.
• AC-coupling allows easier circuit design. If
dc-coupling is required, be aware of the excess
power dissipation that can occur due to
level-shifting the output through the output
common-mode voltage control.
• Do not terminate the output unless required. Many
open-loop, class-A amplifiers require 50-Ω
termination for proper operation, but closed-loop
fully differential amplifiers drive a specific output
THS4500
THS4501
SLOS350F – APRIL 2002 – REVISED OCTOBER 2011
voltage regardless of the load impedance present.
Terminating the output of a fully differential
amplifier with a heavy load adversely affects the
amplifier linearity.
• Comprehend the V_OCM input drive requirements.
Determine if the ADC voltage reference can
provide the required amount of current to move
V_OCM to the desired value. A buffer may be
needed.
• Decouple the V_OCM pin to eliminate the antenna
effect. V_OCM is a high-impedance node that can
act as an antenna. A large decoupling capacitor
on this node eliminates this problem.
• Know the input common-mode range. If the input
signal is referenced around the negative
power-supply rail (for example, around ground on
a single 5 V supply), then the THS4500/1
accommodates the input signal. If the input signal
is referenced around midrail, choose the
THS4502/3 for the best operation.
• Packaging makes a difference at higher
frequencies. If possible, choose the smaller,
thermally-enhanced MSOP package for the best
performance. As a rule, lower junction
temperatures provide better performance. If
possible, use a thermally-enhanced package,
even if the power dissipation is relatively small
compared to the maximum power dissipation
rating to achieve the best results.
• Understand the effect of the load impedance seen
by the fully differential amplifier when performing
system-level intercept point calculations. Lighter
loads (such as those presented by an ADC) allow
smaller intercept points to support the same level
of intermodulation distortion performance.
EXAMPLE ANALOG-TO-DIGITAL
CONVERTER DRIVER CIRCUITS
The THS4500 family of devices is designed to drive
high-performance ADCs with extremely high linearity,
allowing for the maximum effective number of bits at
the output of the data converter. Two representative
circuits shown below highlight single-supply operation
and split supply operation, respectively. Specific
feedback resistor, gain resistor, and feedback
capacitor values are not shown, as these values
depend on the frequency of interest. Information on
calculating these values can be found in the
applications material above.
Copyright © 2002–2011, Texas Instruments Incorporated
Product Folder Link(s): THS4500 THS4501
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