THS6072 Datasheet, PDF (20/31 Pages) Texas Instruments – LOW-POWER ADSL DIFFERENTIAL RECEIVER

THS6072
LOW-POWER ADSL DIFFERENTIAL RECEIVER
SLOS290B – FEBRUARY 2000 – REVISED JUNE 2001
APPLICATION INFORMATION
general PowerPAD design considerations (continued)
The next consideration is the package constraints. The two sources of heat within an amplifier are quiescent
power and output power. The designer should never forget about the quiescent heat generated within the
device, especially multiamplifier devices. Because these devices have linear output stages (Class A-B), most
of the heat dissipation is at low output voltages with high output currents. Figure 48 and Figure 49 show this
effect, along with the quiescent heat, with an ambient air temperature of 50°C. Obviously, as the ambient
temperature increases, the limit lines shown will drop accordingly. The area under each respective limit line is
considered the safe operating area. Any condition above this line will exceed the amplifier’s limits and failure
may result. When using V_CC = ±5 V, there is generally not a heat problem, even with SOIC packages. But, when
using
V_CC = ±15 V, the SOIC package is severely limited in the amount of heat it can dissipate. The other key factor
when looking at these graphs is how the devices are mounted on the PCB. The PowerPAD devices are
extremely useful for heat dissipation. But, the device should always be soldered to a copper plane to fully use
the heat dissipation properties of the PowerPAD. The SOIC package, on the other hand, is highly dependent
on how it is mounted on the PCB. As more trace and copper area is placed around the device, θ_JA decreases
and the heat dissipation capability increases. The currents and voltages shown in these graphs are for the total
package.
THS6072
MAXIMUM RMS OUTPUT CURRENT
vs
RMS OUTPUT VOLTAGE DUE TO THERMAL LIMITS
200
Package With
180
θ_JA ≤ 64°C/W
Maximum Output
Current Limit Line
160
140
120
100
80
60
40
20
0
0
SO-8 Package
θ_JA = 167°C/W
Low-K Test PCB
Safe Operating Area
SO-8 Package
θ_JA = 98°C/W
High-K Test PCB
VCC = ± 5 V
TJ = 150°C
TA = 50°C
Both Channels
1
2
3
4
5
| VO | – RMS Output Voltage – V
Figure 48
THS6072
MAXIMUM RMS OUTPUT CURRENT
vs
RMS OUTPUT VOLTAGE DUE TO THERMAL LIMITS
1000
VCC = ± 15 V
TJ = 150°C
TA = 50°C
Both Channels
Maximum Output
Current Limit Line
100
SO-8 Package
10
θ_JA = 98°C/W
High-K Test PCB
DGN Package
θ_JA = 58.4°C/W
SO-8 Package
θ_JA = 167°C/W
Safe Operating Area ^{Low-K Test PCB}
1
0
3
6
9
12
15
| VO | – RMS Output Voltage – V
Figure 49
20
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