LMD18245_06 Datasheet, PDF (2/21 Pages) National Semiconductor (TI) – 3A, 55V DMOS Full-Bridge Motor Driver

Connection Diagram
01187802
Top View
15-Lead TO-220 Molded Power Package
Order Number LMD18245T
See NS Package Number TA15A
Pinout Descriptions (See Functional Block
and Connection Diagrams)
Pin 1, OUT 1: Output node of the first half H-bridge.
Pin 2, COMP OUT: Output of the comparator. If the voltage
at CS OUT exceeds that provided by the DAC, the compara-
tor triggers the monostable.
Pin 3, RC: Monostable timing node. A parallel resistorca-
pacitor network connected between this node and ground
sets the monostable timing pulse at about 1.1 RC seconds.
Pin 5, PGND: Ground return node of the power bridge. Bond
wires (internaI) connect PGND to the tab of the TO-220
package.
Pins 4 and 6 through 8, M4 through M1: Digital inputs of
the DAC. These inputs make up a four-bit binary number
with M4 as the most significant bit or MSB. The DAC pro-
vides an analog voltage directly proportional to the binary
number applied at M4 through M1.
Pin 9, V_CC: Power supply node.
Pin 10, BRAKE: Brake logic input. Pulling the BRAKE input
logic-high activates both sourcing switches of the power
bridge — effectively shorting the load. See Table 1. Shorting
the load in this manner forces the load current to recirculate
and decay to zero.
Pin 11, DIRECTION: Direction logic input. The logic level at
this input dictates the direction of current flow in the load.
See Table 1.
Pin 12, SGND: Ground return node of all signal level circuits.
Pin 13, CS OUT: Output of the current sense amplifier. The
current sense amplifier sources 250 µA (typical) per ampere
of total forward current conducted by the upper two switches
of the power bridge.
Pin 14, DAC REF: Voltage reference input of the DAC. The
DAC provides an analog voltage equal to V_{DAC REF} x D/16,
where D is the decimal equivalent (0–15) of the binary
number applied at M4 through M1.
Pin 15, OUT 2: Output node of the second half H-bridge.
TABLE 1. Switch Control Logic Truth Table
BRAKE DIRECTION MONO Active Switches
H
X
X Source 1, Source 2
L
H
L Source 2
L
H
H Source 2, Sink 1
L
L
L Source 1
L
L
H Source 1, Sink 2
X = don’t care
MONO is the output of the monostable.
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