LM3712 Datasheet, PDF (2/13 Pages) National Semiconductor (TI) – Microprocessor Supervisory Circuits with Separate Watchdog Timer Output, Power Fail Input and Manual Reset

Connection Diagram
Top View
(looking from the coating side)
micro SMD 9 Bump Package
BPA09
Pin Description
Bump No.
A1
Name
MR
B1
V_CC
C1
RESET
RESET
C2
PFO
C3
WDO
B3
GND
A3
WDI
A2
PFI
B2
NC
20011901
Function
Manual-Reset input. When MR is less than V_MRT (Manual Reset Threshold)
RESET/RESET is engaged.
Power Supply input.
Reset Logic Output. Pulses low for t_RP (Reset Timeout Period) when triggered, and stays
low whenever V_CC is below the reset threshold or when MR is below V_MRT. It remains low
for t_RP after either V_CC rises above the reset threshold, or after MR input rises above
V_MRT (LM3712 only).
Reset Logic Output. RESET is the inverse of RESET (LM3713 only).
Power-Fail Logic Output. When PFI is below V_PFT PFO goes low; otherwise, PFO remains
high.
Watchdog Output. If no digital activity is detected on WDI (Watchdog Input) for a period
exceeding t_WD, this output pulls low.
Ground reference for all signals.
Watchdog Input Transition Monitor: If no transition activity occurs for a period exceeding
t_WD (Watchdog Timeout Period), reset is engaged.
Power-Fail Comparator Input. When PFI is less than V_PFT (Power-Fail Reset Threshold),
the PFO goes low; otherwise, PFO remains high.
No Connect. Test input used at factory only. Leave floating.
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