COP880C Datasheet, PDF (18/31 Pages) National Semiconductor (TI) – Microcontrollers

Memory Map (Continued)
Address
FE
B Register
Contents
Reading unused memory locations below 7FH will return all
ones. Reading other unused memory locations will return
undefined data.
Instruction Set
REGISTER AND SYMBOL DEFINITIONS
Registers
A 8-bit Accumulator register
B 8-bit Address register
X 8-bit Address register
SP 8-bit Stack pointer register
PC 15-bit Program counter register
Instruction Set
ADD
ADC
add
add with carry
SUBC
subtract with carry
AND
OR
XOR
IFEQ
IFGT
IFBNE
DRSZ
SBIT
Logical AND
Logical OR
Logical Exclusive-OR
IF equal
IF greater than
IF B not equal
Decrement Reg. ,skip if zero
Set bit
RBIT
Reset bit
IFBIT
If bit
X
LD A
LD mem
LD Reg
X
X
LD A
LD A
LD M
CLRA
INCA
DECA
LAID
DCORA
RRCA
Exchange A with memory
Load A with memory
Load Direct memory Immed.
Load Register memory Immed.
Exchange A with memory [B]
Exchange A with memory [X]
Load A with memory [B]
Load A with memory [X]
Load Memory Immediate
Clear A
Increment A
Decrement A
Load A indirect from ROM
DECIMAL CORRECT A
ROTATE A RIGHT THRU C
PU upper 7 bits of PC
PL lower 8 bits of PC
C 1-bit of PSW register for carry
HC Half Carry
GIE 1-bit of PSW register for global interrupt enable
Symbols
[B] Memory indirectly addressed by B register
[X] Memory indirectly addressed by X register
Mem Direct address memory or [B]
MemI Direct address memory or [B] or Immediate data
Imm 8-bit Immediate data
Reg Register memory: addresses F0 to FF (Includes B, X
and SP)
Bit Bit number (0 to 7)
← Loaded with
↔ Exchanged with
A ← A + MemI
A ← A + MemI + C, C ← Carry
HC ← Half Carry
A ← A + MemI +C, C ← Carry
HC ← Half Carry
A ← A and MemI
A ← A or MemI
A ← A xor MemI
Compare A and MemI, Do next if A = MemI
Compare A and MemI, Do next if A > MemI
Do next if lower 4 bits of B ≠ Imm
Reg ← Reg − 1, skip if Reg goes to 0
1 to bit,
Mem (bit= 0 to 7 immediate)
0 to bit,
Mem
If bit,
Mem is true, do next instr.
A ↔ Mem
A ← MemI
Mem ← Imm
Reg ← Imm
A ↔ [B] (B ← B±1)
A ↔ [X] (X ← X±1)
A ← [B] (B ← B±1)
A ← [X] (X ← X±1)
[B] ← Imm (B ← B±1)
A←0
A←A+1
A←A−1
A ← ROM(PU,A)
A ← BCD correction (follows ADC, SUBC)
C → A7 → … → A0 → C
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