LMH6624_05 Datasheet, PDF (17/19 Pages) National Semiconductor (TI) – Single/Dual Ultra Low Noise Wideband Operational Amplifier

Application Section (Continued)
20058931
FIGURE 11. Noise Magnetic Media Equalizer
20058932
FIGURE 12. Equalizer Frequency Response
LAYOUT CONSIDERATION
National Semiconductor suggests the copper patterns on the
evaluation boards listed below as a guide for high frequency
layout. These boards are also useful as an aid in device
testing and characterization. As is the case with all high-
speed amplifiers, accepted-practice RF design technique on
the PCB layout is mandatory. Generally, a good high fre-
quency layout exhibits a separation of power supply and
ground traces from the inverting input and output pins. Para-
sitic capacitances between these nodes and ground may
cause frequency response peaking and possible circuit os-
cillations (see Application Note OA-15 for more information).
Use high quality chip capacitors with values in the range of
1000pF to 0.1F for power supply bypassing. One terminal of
each chip capacitor is connected to the ground plane and the
other terminal is connected to a point that is as close as
possible to each supply pin as allowed by the manufacturer’s
design rules. In addition, connect a tantalum capacitor with a
value between 4.7µF and 10µF in parallel with the chip
capacitor. Signal lines connecting the feedback and gain
resistors should be as short as possible to minimize induc-
tance and microstrip line effect. Place input and output ter-
mination resistors as close as possible to the input/output
pins. Traces greater than 1 inch in length should be imped-
ance matched to the corresponding load termination.
Symmetry between the positive and negative paths in the
layout of differential circuitry should be maintained to mini-
mize the imbalance of amplitude and phase of the differential
signal.
These free evaluation boards are shipped when a device
sample request is placed with National Semiconductor.
Component value selection is another important parameter
in working with high speed/high performance amplifiers.
Choosing external resistors that are large in value compared
to the value of other critical components will affect the closed
loop behavior of the stage because of the interaction of
these resistors with parasitic capacitances. These parasitic
capacitors could either be inherent to the device or be a
by-product of the board layout and component placement.
Moreover, a large resistor will also add more thermal noise to
the signal path. Either way, keeping the resistor values low
will diminish this interaction. On the other hand, choosing
very low value resistors could load down nodes and will
contribute to higher overall power dissipation and high dis-
tortion.
Device
Package
LMH6624MF
LMH6624MA
LMH6626MA
LMH6626MM
SOT23–5
SOIC-8
SOIC-8
MSOP-8
Evaluation Board Part
Number
CLC730216
CLC730227
CLC730036
CLC730123
17
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