THS4121 Datasheet, PDF (16/31 Pages) National Semiconductor (TI) – HIGH-SPEED FULLY DIFFERENTIAL I/O AMPLIFIERS

THS4120
THS4121
SLOS319D – FEBRUARY 2001 – REVISED OCTOBER 2004
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PRINCIPLES OF OPERATION (continued)
the amplifier in the power-on mode of operation. To turn off (disable) the amplifier in an effort to conserve power,
the power-down pin can be driven towards the negative rail or ground. The threshold voltages for power-on and
power-down are relative to the supply rails and given in the specification tables. Above the Enable Threshold
Voltage, the device is on. Below the Disable Threshold Voltage, the device is off. Behavior in between these
threshold voltages is not specified.
Note that this power-down functionality is just that; the amplifier consumes less power in power-down mode. The
power-down mode is not intended to provide a high-impedance output. The power-down functionality is not
intended to allow use as a 3-state bus driver. When in power-down mode, the impedance looking back into the
output of the amplifier is dominated by the feedback and gain-setting resistors, but the output impedance of the
device itself varies depending on the voltage applied to the outputs.
The time delays associated with turning the device on and off are specified as the time it takes for the amplifier
to reach 50% of the nominal quiescent current. The enable time delay is in the order of microseconds due to the
amplifier moving in and out of the linear mode of operation.
3.3 V
PD
10 kW
+
THS4120
V_IN
_
V_OCM
Figure 28.
Due to the similarity of the standard inverting amplifier configuration, the output impedance appears to be low
while in the power-down state. This is because the feedback resistor (R_f) and the gain resistor (R_(g)) are still
connected to the circuit. Therefore, a current path is allowed between the input of the amplifier and the output of
the amplifier. An example of the closed-loop output impedance is shown in Figure 29.
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