ADC10030 Datasheet, PDF (15/17 Pages) National Semiconductor (TI) – 10-Bit, 30 MSPS, 125 mW A/D Converter with Internal Sample and Hold

Applications Information (Continued)
Figure 7 gives an example of a suitable layout, ground plane
separation, and bypass capacitor placement. All analog cir-
cuitry (input amplifiers, filters, reference components, etc.)
should be placed on or over the analog ground plane. All
digital circuitry and I/O lines should be over the digital ground
plane.
Digital and analog signal lines should never run parallel to
each other in close proximity with each other. They should
only cross each other when absolutely necessary, and then
only at 90˚ angles. Violating this rule can result in digital
noise getting into the input, which degrades accuracy and
dynamic performance (THD, SNR, SINAD).
DS101064-21
FIGURE 7. An Acceptable Layout Pattern for the ADC10030
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