LMH6550_06 Datasheet, PDF (14/17 Pages) National Semiconductor (TI) – Differential, High Speed Op Amp

Application Section (Continued)
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FIGURE 9. Transformer Out High Impedance Load
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FIGURE 10. Calculating Transformer Circuit Net Gain
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FIGURE 11. Transformer Out Low Impedance Load
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FIGURE 12. Driving 50Ω Test Equipment
CAPACITIVE DRIVE
As noted in the Driving ADC section, capacitive loads should
be isolated from the amplifier output with small valued resis-
tors. This is particularly the case when the load has a resis-
tive component that is 500Ω or higher. A typical ADC has
capacitive components of around 10 pF and the resistive
component could be 1000Ω or higher. If driving a transmis-
sion line, such as 50Ω coaxial or 100Ω twisted pair, using
matching resistors will be sufficient to isolate any subse-
quent capacitance. For other applications see the “Sug-
gested R_OUT vs. Cap Load” charts in the Typical Perfor-
mance Characteristics section.
POWER DISSIPATION
The LMH6550 is optimized for maximum speed and perfor-
mance in the small form factor of the standard SOIC pack-
age, and is essentially a dual channel amplifier. To ensure
maximum output drive and highest performance, thermal
shutdown is not provided. Therefore, it is of utmost impor-
tance to make sure that the T_JMAX is never exceeded due to
the overall power dissipation.
Follow these steps to determine the Maximum power dissi-
pation for the LMH6550:
1. Calculate the quiescent (no-load) power: P_AMP = I_CC*
(V_S), where V_S = V⁺ - V^−. (Be sure to include any current
through the feedback network if V_OCM is not mid rail.)
2. Calculate the RMS power dissipated in each of the
output stages: P_D (rms) = rms ((V_S - V^+OUT) * I^+OUT) +
rms ((V_S − V^−OUT) * I^−OUT) , where V_OUT and I_OUT are
the voltage and the current measured at the output pins
of the differential amplifier as if they were single ended
amplifiers and V_S is the total supply voltage.
3. Calculate the total RMS power: P_T = P_AMP + P_D.
The maximum power that the LMH6550 package can dissi-
pate at a given temperature can be derived with the following
equation:
P_MAX = (150˚ – T_AMB)/ θ_JA, where T_AMB = Ambient tempera-
ture (˚C) and θ_JA = Thermal resistance, from junction to
ambient, for a given package (˚C/W). For the SOIC package
θ_JA is 150˚C/W, and for the MSOP package it is 235˚C/W.
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