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PC87415 Datasheet, PDF (13/42 Pages) National Semiconductor (TI) – PCI-IDE DMA Master Mode Interface Controller
5 0 Configuration Registers (Continued)
Reg
(HEX)
44
RW
Description
RW
CHANNEL 1 DEVICE 1 DATA READ TIMING REGISTER
Bit 3 – 0 Command active time (in PCI CLKs) Default e 0101 (Mode 0)
1111 e
1110 e
1101 e
2 CLKs
3 CLKs
4 CLKs
0001 e 16 CLKs
0000 e 17 CLKs
Bit 7 – 4 Command recovery time (in PCI CLKs) Default e 1000 (Mode 0)
1111 e
1110 e
1101 e
1 CLKs
2 CLKs
3 CLKs
0001 e 15 CLKs
0000 e 16 CLKs
45
R W CHANNEL 1 DEVICE 1 DATA WRITE TIMING REGISTER
Bit 3 – 0 Command active time (in PCI CLKs) Default e 0101 (Mode 0)
1111 e
1110 e
1101 e
2 CLKs
3 CLKs
4 CLKs
0001 e 16 CLKs
0000 e 17 CLKs
Bit 7 – 4 Command recovery time (in PCI CLKs) Default e 1000 (Mode 0)
1111 e
1110 e
1101 e
1 CLKs
2 CLKs
3 CLKs
0001 e 15 CLKs
0000 e 16 CLKs
48
R W CHANNEL 1 DEVICE 2 DATA READ TIMING REGISTER
Bit 3 – 0 Command active time (in PCI CLKs) Default e 0101 (Mode 0)
1111 e
1110 e
1101 e
2 CLKs
3 CLKs
4 CLKs
0001 e 16 CLKs
0000 e 17 CLKs
Bit 7 – 4 Command recovery time (in PCI CLKs) Default e 1000 (Mode 0)
1111 e
1110 e
1101 e
1 CLKs
2 CLKs
3 CLKs
0001 e 15 CLKs
0000 e 16 CLKs
13
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