LP38500-ADJ Datasheet, PDF (12/16 Pages) National Semiconductor (TI) – 1.5A FlexCap Low Dropout Linear Regulator for 2.7V to 5.5V Inputs

The LP38500/2-ADJ is available in the TO-263 and LLP-8
packages. The thermal resistance depends on the amount of
copper area allocated to heat transfer.
HEATSINKING TO-263 and TO-263 THIN PACKAGES
The TO-263 package and TO-263 THIN package use the
copper plane on the PCB as a heatsink. The DAP of the pack-
age is soldered to the copper plane for heat sinking. Figure
5 shows a typical curve for the θ_JA of the TO-263 package for
different copper area sizes (the thermal performance of both
TO-263 and TO-263 THIN are the same). The tests were
done using a PCB with 1 ounce copper on top side only, with
copper patterns which were square in shape.
30036152
FIGURE 5. θ_JA vs Copper Area for TO-263 Package
As shown in the figure, increasing the copper area beyond 1.5
square inch produces very little improvement.
HEATSINKING LLP-8 PACKAGE
The junction-to-ambient thermal resistance for the LLP-8
package is dependent on how much PCB copper is present
to conduct heat away from the device. The LP38502SD-ADJ
evaluation board (980600046-100) was tested and gave a
result of about 80°C/W with a power dissipation of 1W and no
external airflow. This evaluation board is a two layer board
using two ounce copper, and the copper area on topside for
heatsinking is approximately two square inches. Multiple vias
under the DAP also thermally connect to the backside layer
which has about three square inches of copper dedicated to
heatsinking.
Finite modeling of the LP38502SD-ADJ with a four layer
board (JEDEC JESD51-7 and JESD51-5) with one thermal
via directly under the DAP to the first copper plane predicts a
θ_JA of 72°C/W.
With four thermal vias directly under the DAP to the first cop-
per plane, the modeling predicts a θ_JA of 50°C/W.
Adding a dog-bone copper area with four additional thermal
vias in the dog-bone area to the first copper plane can improve
θ_JA to 45C°C/W.
See Application Note AN-1520 A Guide to Board Layout for
Best Thermal Resistance for Exposed Packages for addition-
al thermal considerations for printed circuit board layouts.
www.national.com
12