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COP413C Datasheet, PDF (11/16 Pages) National Semiconductor (TI) – Single-Chip CMOS Microcontrollers
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COP413C Instruction Set
Table II is a symbol table providing internal architecture in-
struction operand and operational symbols used in the in-
struction set table
Table III provides the mnemonic operand machine code
data flow skip conditions and description associated with
each instruction in the COP413C instruction set
TABLE II COP413C Instruction Set Table Symbols
Symbol
Definition
INTERNAL ARCHITECTURE SYMBOLS
A
4-bit Accumulator
B
6-bit RAM Address Register
Br
Upper 2 bits of B (register address)
Bd
Lower 4 bits of B (digit address)
C
1-bit Carry Register
EN
4-bit Enable Register
G
4-bit Register to latch data for G I O Port
L
8-bit TRI-STATE I O Port
M
4-bit contents of RAM Memory pointed to by B
Register
PC
9-bit ROM Address Register (program counter)
Q
8-bit Register to latch data for L I O Port
SA
9-bit Subroutine Save Register A
SB
9-bit Subroutine Save Register B
SIO
4-bit Shift Register and Counter
SK
Logic-Controlled Clock Output
Symbol
Definition
INSTRUCTION OPERAND SYMBOLS
d
4-bit Operand Field 0 – 15 binary (RAM Digit Select)
r
2-bit Operand Field 0 – 3 binary (RAM Register
Select)
a
9-bit Operand Field 0 – 511 binary (ROM Address)
y
4-bit Operand Field 0 – 15 binary (Immediate Data)
RAM(s) Contents of RAM location addressed by s
ROM(t) Contents of ROM location addressed by t
OPERATIONAL SYMBOLS
a
Plus
b
Minus
x Replaces
Is exchanged with
e
Is equal to
A
The one’s complement of A
Z
Exclusive-OR
Range of values
TABLE III COP413C Instruction Set
Mnemonic
Operand
Hex
Code
Machine
Language Code
(Binary)
Data Flow
Skip Conditions
Description
ARITHMETIC INSTRUCTIONS
ASC
30
0011 0000
x A a C a RAM(B) A Carry
Carry x C
Add with Carry Skip on
Carry
ADD
31
x 0011 0001 A a RAM(B) A
None
Add RAM to A
AISC
y
5b
0101 y
AayxA
Carry
Add immediate Skip on
Carry (y i 0)
CLRA
00
x 0000 0000 0 A
None
Clear A
COMP
40
x 0100 0000 A A
None
One’s complement of A to A
NOP
44
0100 0100 None
None
No Operation
RC
32
x 0011 0010 ‘‘0’’ C
None
Reset C
SC
22
x 0010 0010 ‘‘1’’ C
None
Set C
XOR
02
0000 0010
x A Z RAM(B) A
None
Exclusive-OR RAM with A
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