LMK02000 Datasheet, PDF (1/20 Pages) National Semiconductor (TI) – Precision Clock Conditioner with Integrated PLL

September 2007
LMK02000
Precision Clock Conditioner with Integrated PLL
General Description
The LMK02000 precision clock conditioner combines the
functions of jitter cleaning/reconditioning, multiplication, and
distribution of a reference clock. The device integrates a high
performance Integer-N Phase Locked Loop (PLL), three
LVDS, and five LVPECL clock output distribution blocks.
Each clock distribution block includes a programmable di-
vider, a phase synchronization circuit, a programmable delay,
a clock output mux, and an LVDS or LVPECL output buffer.
This allows multiple integer-related and phase-adjusted
copies of the reference to be distributed to eight system com-
ponents.
The clock conditioner comes in a 48-pin LLP package and is
footprint compatible with other clocking devices in the same
family.
Features
■ ^{20 fs additive jitter}
■ ^{Integrated Integer-N PLL with outstanding normalized}
phase noise contribution of -224 dBc/Hz
■ ^{Clock output frequency range of 1 to 800 MHz}
■ ^{3 LVDS and 5 LVPECL clock outputs}
■ ^{Dedicated divider and delay blocks on each clock output}
■ ^{Pin compatible family of clocking devices}
■ ^{3.15 to 3.45 V operation}
■ ^{Package: 48 pin LLP (7.0 x 7.0 x 0.8 mm)}
Target Applications
■ ^{Data Converter Clocking}
■ ^{Networking, SONET/SDH, DSLAM}
■ ^{Wireless Infrastructure}
■ ^Medical
■ ^{Test and Measurement}
■ ^{Military / Aerospace}
Functional Block Diagram
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