LMK01000 Datasheet, PDF (1/18 Pages) National Semiconductor (TI) – 1.6 GHz High Performance Clock Buffer, Divider, and Distributor

March 6, 2008
LMK01000/LMK01010/LMK01020
1.6 GHz High Performance Clock Buffer, Divider, and
Distributor
General Description
The LMK01000/LMK01010/LMK01020 family provides an
easy way to divide and distribute high performance clock sig-
nals throughout the system. These devices provide best-in-
class noise performance and are designed to be pin-to-pin
and footprint compatible with LMK03000/LMK02000 family of
precision clock conditioners.
The LMK01000/LMK01010/LMK01020 family features two
programmable clock inputs (CLKin0 and CLKin1) that allow
the user to dynamically switch between different clock do-
mains.
Each device features 8 clock outputs with independently pro-
grammable dividers and delay adjustments. The outputs of
the device can be easily synchronized by an external pin
(SYNC*).
Target Applications
■ ^{High performance Clock Distribution}
■ ^{Wireless Infrastructure}
■ ^{Medical Imaging}
■ ^{Wired Communications}
■ ^{Test and Measurement}
■ ^{Military / Aerospace}
Features
■ ^{30 fs additive jitter (100 Hz to 20 MHz)}
■ ^{Dual clock inputs}
■ ^{Programmable output channels (0 to 1600 MHz)}
— LMK01000: 3 LVDS outputs (CLKout0 - CLKout2) + 5
LVPECL outputs (CLKout3 - CLKout7)
— LMK01010: 8 LVDS outputs
— LMK01020: 8 LVPECL outputs
— Channel divider values of 1, 2 to 510 (even divides)
— Programmable output skew control
■ ^{External synchronization}
■ ^{Pin compatible family of clocking devices}
■ ^{3.15 to 3.45 V operation}
■ ^{Package: 48 pin LLP (7.0 x 7.0 x 0.8 mm)}
System Diagram
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