JM54AC10BDA Datasheet, PDF (1/8 Pages) National Semiconductor (TI) – Triple 3-Input NAND Gate

March 1993
54AC 74AC10  74ACT10
Triple 3-Input NAND Gate
General Description
The ’AC ’ACT10 contains three 3-input NAND gates
Features
Y _{ICC reduced by 50% on 54AC 74AC only}
Y _{Outputs source sink 24 mA}
Y _{Standard Military Drawing (SMD)}
’AC10 5962-87610
Y _{For Military 54ACT10 device see the 54ACTQ10}
Logic Symbol
IEEE IEC
Connection Diagrams
Pin Assignment
for DIP Flatpak and SOIC
Pin Assignment
for LCC
Pin Names
A_n B_n C_n
O_n
TL F 9915 1
Description
Inputs
Outputs
TL F 9915 3
TL F 9915 2
FACTTM is a trademark of Nat onal Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 9915
RRD B30M75 Printed in U S A