DS96F173M Datasheet, PDF (1/10 Pages) National Semiconductor (TI) – Quad Differential Receivers

July 2000
DS96F173M/DS96F175C/DS96F175M
EIA-485/EIA-422 Quad Differential Receivers
General Description
The DS96F173 and the DS96F175 are high speed quad dif-
ferential line receivers designed to meet the EIA-485 stan-
dard. The DS96F173 and the DS96F175 offer improved per-
formance due to the use of L-FAST bipolar technology. The
use of LFAST technology allows the DS96F173 and
DS96F175 to operate at higher speeds while minimizing
power consumption.
The DS96F173 and the DS96F175 have TRI-STATE^® out-
puts and are optimized for balanced multipoint data bus
transmission at rates up to 15 Mbps. The receivers feature
high input impedance, input hysteresis for increased noise
immunity, and input sensitivity of 200 mV over a common
mode input voltage range of −7V to +12V. The receivers are
therefore suitable for multipoint applications in noisy environ-
ments. The DS96F173 features an active high and active
low Enable, common to all four receivers. The DS96F175
features separate active high Enables for each receiver pair.
Features
n Meets EIA-485, EIA-422A, EIA-423A standards
n Designed for multipoint bus applications
n TRI-STATE outputs
n Common mode input voltage range: −7V to +12V
n Operates from single +5.0V supply
n Reduced power consumption (I_CC = 50 mA max)
n Input sensitivity of ±200 mV over common mode range
n Input hysteresis of 50 mV typical
n High input impedance
n Military temperature range available
n Qualified for MIL STD 883C
n Available to standard military drawings (SMD)
n Available in DIP(J), LCC(E), and FlatPak (W) packages
n DS96F173 and DS96F175 are lead and function
compatible with SN75173/175 or the
AM26LS32/MC3486
Logic Diagrams
DS96F175
DS009627-10
DS009627-11
Function Tables
(Each Receiver) DS96F173
Differential Inputs
A–B
V_ID ≥ 0.2V
V_ID ≤ −0.2V
X
X
H = High Level
L = Low Level
Z = High Impedance (off)
X = Don’t Care
Enable
E
E
H
X
X
L
H
X
X
L
L
X
X
H
Output
Y
H
H
L
L
Z
Z
(Each Receiver) DS96F175
Differential Inputs
A–B
V_ID ≥ 0.2V
V_ID ≤ −0.2V
X
Enable
E
H
H
L
Output
Y
H
L
Z
TRI-STATE^® is a registered trademark of National Semiconductor Corporation.
© 2000 National Semiconductor Corporation DS009627
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