DS90CP22_07 Datasheet, PDF (1/10 Pages) National Semiconductor (TI) – 800 Mbps 2x2 LVDS Crosspoint Switch

December 5, 2007
DS90CP22
800 Mbps 2x2 LVDS Crosspoint Switch
General Description
DS90CP22 is a 2x2 crosspoint switch utilizing LVDS (Low
Voltage Differential Signaling) technology for low power, high
speed operation. Data paths are fully differential from input to
output for low noise generation and low pulse width distortion.
The non-blocking design allows connection of any input to any
output or outputs. LVDS I/O enable high speed data trans-
mission for point-to-point interconnects. This device can be
used as a high speed differential crosspoint, 2:1 mux, 1:2 de-
mux, repeater or 1:2 signal splitter. The mux and demux
functions are useful for switching between primary and back-
up circuits in fault tolerant systems. The 1:2 signal splitter and
2:1 mux functions are useful for distribution of serial bus
across several rack-mounted backplanes.
The DS90CP22 accepts LVDS signal levels, LVPECL levels
directly or PECL with attenuation networks.
The individual LVDS outputs can be put into TRI-STATE by
use of the enable pins.
For more details, please refer to the Application Information
section of this datasheet.
Features
■ ^{DC - 800 Mbps low jitter, low skew operation}
■ ^{65 ps (typ) of pk-pk jitter with PRBS = 223−1 data pattern}
at 800 Mbps
■ ^{Single +3.3 V Supply}
■ ^{Less than 330 mW (typ) total power dissipation}
■ ^{Non-blocking "'Switch Architecture"'}
■ ^{Balanced output impedance}
■ ^{Output channel-to-channel skew is 35 ps (typ)}
■ ^{Configurable as 2:1 mux, 1:2 demux, repeater or 1:2 signal}
splitter
■ ^{LVDS receiver inputs accept LVPECL signals}
■ ^{Fast switch time of 1.2ns (typ)}
■ ^{Fast propagation delay of 1.3ns (typ)}
■ ^{Receiver input threshold < ±100 mV}
■ ^{Available in 16 lead TSSOP and SOIC packages}
■ ^{Conforms to ANSI/TIA/EIA-644-1995 LVDS standard}
■ ^{Operating Temperature: −40°C to +85°C}
Connection Diagrams
10105305
Order Number DS90CP22M-8 (SOIC)
Order Number DS90CP22MT (TSSOP)
10105310
Diff. Output Eye-Pattern in 1:2 split mode @ 800 Mbps
Conditions: 3.3 V, PRBS = 2²³âˆ’1 data pattern,
V_ID = 300mV, V_CM = +1.2 V, 200 ps/div, 100 mV/div
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