DP83953 Datasheet, PDF (1/90 Pages) National Semiconductor (TI) – Repeater Interface Controller with Security Features, Internal Drivers and Integrated Filters

PRELIMINARY
March 1998
DP83953 (RIC2A)
Repeater Interface Controller with Security Features,
Internal Drivers and Integrated Filters
General Description
The DP83953 Repeater Interface Controller with Security
Features and Integrated Transmit Filters (RIC2A) is an en-
hanced version of the DP83952 Repeater Interface Control-
ler with Security Features (RIC II). The RIC2A integrates
driver and filter circuitry into the RIC II design.
The functionality of the RIC2A is essentially similar to the
RIC II, but the pin definitions have been modified to reflect
the added integrated drivers and filters. Additionally, the
power and ground pin locations have been rearranged.
Therefore, the RIC2A is not a drop in replacement for the
RIC ll.
The RIC2A is National Semiconductor’s managed repeater
solution designed to comply with IEEE 802.3 Repeater
Specifications. Segment partition and jabber lockup protec-
tion state machines are implemented in accordance with
this standard. The RIC2A has thirteen network interface
ports available, including an AUI compatible port. The AUI
port incorporates drivers to connect an external MAU using
maximum length cable. Similarly, the other twelve interface
ports integrate 10BASE-T transceivers with supporting driv-
er and transmit filter circuitry. (continued)
Features
T Fully compliant with the IEEE 802.3 Repeater Specifica-
tion
T 12 IEEE 802.3 10BASE-T compatible ports with built-in
drivers and analog transmit filters; additional external
isolation transformers are required to implement hubs
T 1 IEEE 802.3 compatible AUI port
T Cascadable for larger hub applications
T On chip Elasticity Buffer, Manchester encoder and de-
coder
T Separate Partition state machines for each port
T Compatible with 802.3k Hub Management require-
ments
T LED displays to provide port status information, includ-
ing receive, collision, partition, jabber and link status,
T Power-up configuration options
T Repeater and Partition Specifications, Status Display,
Processor Operations
T Simple processor interface for repeater management
and port disable.
T On-chip Event Counters and Event Flag Arrays
T Serial Management Bus Interface to combine packet
and repeater status information
T Single 5V supply
The Security Features
T Prevents unauthorized eavesdropping and/or intrusion
on a per port basis
T 58 On Chip CAMs (Content Addressable Memory) al-
low storage of acceptable addresses
T Learn mode automatically records addresses of at-
tached node
System Diagram
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