DP83907 Datasheet, PDF (1/70 Pages) National Semiconductor (TI) – AT/LANTIC™ II

PRELIMINARY
November 1995
DP83907 AT LANTIC^TMII
General Description
The DP83907 Twisted-Pair Enhanced Coaxial Network In-
terface Controller is a CMOS VLSI device designed for easy
implementation of CSMA CD local area networks
Unique to the DP83907 is the integration of the entire bus
interface for PCAT ISA (Industry Standard Architecture) bus
based systems Hardware and software selectable options
allow the DP83907’s bus interface to be configured in the
same manner as an NE2000 Architecture All bus drivers
and control logic are integrated to reduce board cost and
area
Supported network interfaces include 10BASE5 or
10BASE2 Ethernet via an external transceiver connected to
its AUl port and Twisted-pair Ethernet (10BASE-T) using
the on-board transceiver The DP83907 provides the Ether-
net Media Access Control (MAC) Encode-Decode (ENDEC)
with an AUl interface and 10BASE-T transceiver functions
in accordance with the lEEE 802 3 standards
The DP83907’s integrated 10BASE-T transceiver fully com-
plies with the IEEE standard This functional block incorpo-
rates the receiver transmitter collision heartbeat loop-
back jabber and link integrity blocks as defined in the stan-
dard The transceiver when combined with equalization re-
sistors transmit receive filters and pulse transformers pro-
vides a complete physical interface from the DP83907’s
ENDEC module and the twisted pair medium (continued)
Features
Y _{Controller and integrated bus interface solution for IEEE}
802 3 10BASE5 10BASE2 and 10BASE-T
Y _{Software compatible with industry standard Ethernet}
Adapters Novell ’s NE2000
Y _{No external bus logic or drivers needed}
Y _{Supports jumpered or jumperless configuration}
Y _{Provides EEPROM interface for non-volatile storage of}
configuration data user-defined data and Ethernet
Physical Address
Y _{Allows in-situ programming of EEPROM}
Y _{Integrated controller ENDEC and transceiver}
Y _{Full IEEE 802 3 compliant AUI interface}
Y _{Single 5V supply}
10BASE-T TRANSCEIVER MODULE
Y _{Integrates transceiver functionality}
Y _{Transmitter and receiver functions}
Y _{Collision detect heartbeat and jabber}
Y _{Selectable link integrity test or link disable}
Y _{Polarity Detection Correction}
Y _{Auto switch}
Y _{On chip filter}
ENDEC MODULE
Y _{10 Mbit s Manchester encoding decoding}
Y _{Squelch on receive and collision pairs}
MAC CONTROLLER MODULE
Y _{Software compatible with DP8390 DP83901 DP83902}
Y _{Efficient buffer management implementation}
IN-CIRCUIT TEST
1 0 System Diagram
TRI-STATE is a registered trademark of National Semiconductor Corporation
AT LANTICTM is a trademark of National Semiconductor Corporation
Ethernet is a registered trademark of Xerox Corporation
NetWareTM is a trademark of Novell Incorporated
Novell is a registered trademark of Novell Incorporated
C1995 National Semiconductor Corporation TL F 12082
TL F 12082 – 1
RRD-B30M115 Printed in U S A