CD40192BM Datasheet, PDF (1/6 Pages) National Semiconductor (TI) – Synchronous 4-Bit Up/Down Decade Counter

February 1988
CD40192BM CD40192BC Synchronous
4-Bit Up Down Decade Counter
CD40193BM CD40193BC Synchronous
4-Bit Up Down Binary Counter
General Description
These up down counters are monolithic complementary
MOS (CMOS) integrated circuits The CD40192BM and
CD40192BC are BCD counters while the CD40193BM and
CD40193BC are binary counters
Counting up and counting down is performed by two count
inputs one being held high while the other is clocked The
outputs change on the positive-going transition of this clock
These counters feature preset inputs that are enabled when
load is a logical ‘‘0’’ and a clear which forces all outputs to
‘‘0’’ when it is at logical ‘‘1’’ The counters also have carry
and borrow outputs so that they can be cascaded using no
external circuitry
All inputs are protected against damage due to static dis-
charge by clamps to V_DD and V_SS
Features
Y _{Wide supply voltage range}
3V to 15V
Y _{High noise immunity}
Y _{Low power TTL compatibility}
0 45 V_DD (typ )
Fan out of 2
driving 74L
or 1 driving 74LS
Y _{Carry and borrow outputs for easy expansion to N-bit}
by cascading
Y _{Asynchronous clear}
Y _{Equivalent to}
MM54C192 MM74C192
and MM54C193 MM74C193
Connection Diagram
Dual-In-Line Package
Order Number CD40192B or CD40193
Top View
Cascading Packages
TL F 5988 – 1
C1995 National Semiconductor Corporation TL F 5988
TL F 5988 – 2
RRD-B30M105 Printed in U S A