SM8761 Datasheet, PDF (9/11 Pages) Nippon Precision Circuits Inc – Spread Spectrum Clock Generator

SM8761 series
Typical Connection Circuit
A typical connection circuit diagram is shown in Figure 4.
1) The SM8761 series oscillator circuit between XT and XTN has a built-in feedback resistor (approximately
250kΩ).
2) The oscillator circuit capacitances C101 and C102 connected to XTN and XT, to match the crystal load
capacitor.
3) If using an external clock input on XT, then connections to XT and XTN should be as shown in figure 3.
4) R201 is impedance matching resistor for board pattern.
5) C201 and C202 are bypass capacitors inserted between the supply voltage lines.
C201 is a 0.1µF (approximately) multi-layer ceramic capacitor connected directly alongside the SM8761
series.
C202 is a 33µF (approximately) electrolytic capacitor.
VDD
C202
33µF
VSS
Application Load
VSS
C101
C102
X'tal
VSS
C201
0.1µF
R201
0 to 22Ω
XT
VDD
XTN
MSEL1
VSS MSEL0
CLKOUT TSTN
IC1
SM8761
MSEL1
MSEL0
VSS
Note. This is a sample connection diagram only, and its use is not a guarantee of SM8761 series device characteristics.
Figure 4. Typical connection circuit
MSEL1 and MSEL0 Connection Method
MSEL1 and MSEL0 both support a 1/2V_DD "M" level for 3-value ("H", "M", "L") DC voltage input control.
Typical connection circuits for each input level shown in figure 5. "H" level is input by connection to VDD, and
"L" level by connection to VSS. "M" level is input by connection to the center tap of two identical resistances
in series between VDD and VSS. The recommended resistance is 4.7kΩ.
VDD
VDD
XTN
MSEL1
MSEL0
TSTN
XTN
MSEL1
MSEL0
TSTN
R301
4.7kΩ
R302
4.7kΩ
XTN
MSEL1
MSEL0
TSTN
(a)“H” level
VSS
(b)“M” level
Figure 5. MSEL1 and MSEL0 typical connections
VSS
(c)“L” level
NIPPON PRECISION CIRCUITS INC.—9