English
Language : 

SM8720AV Datasheet, PDF (5/6 Pages) Nippon Precision Circuits Inc – 3-PLL Multi-Output Clock Generator
SM8720AV
FUNCTIONAL DESCRIPTION
27MHz Master Clock
The 27MHz master clock is an external clock input on pin FIN as shown in figure 3. It is recommended that the
master clock have 27.0000MHz frequency, 50% duty, and VDD level amplitude.
Note that the FIN input clock amplitude voltage level should not exceed the absolute maximum rating, other-
wise the device may be damaged.
External Clock FIN (Pin 2)
Internal
Circuits
REFOUT (Pin 16)
Figure 3. External clock input
Output Clock Frequency
The SM8720AV generates 3 output clocks with frequency 22.5792MHz (CLK1OUT), 48MHz (CLK2OUT),
and 36/45/48.6MHz (CLK3OUT), derived from the master clock. In addition, the 27MHz master clock is out-
put on REFOUT. A list of the supported clock frequency and control settings is shown in table 1.
Table 1. Output clock frequency (27.0000MHz master clock frequency)
CLK1_ON
(Pin 7)
CLK2_ON
(Pin 13)
H
H
L
H
L
L
H
H
L
H
L
L
CLK3_ON
(Pin 5)
H
L
REFOUT
(Pin 16)
27.0000
27.0000
27.0000
27.0000
27.0000
27.0000
27.0000
27.0000
Output clock frequency [MHz]
CLK3OUT (Pin 4)
CLK1OUT
(Pin 9)
CLK2OUT
(Pin 11)
SEL1 = H
(Pin 6)
SEL2 = L
(Pin 14)
SEL1 = L
(Pin 6)
SEL2 = L
(Pin 14)
SEL1 = L
(Pin 6)
SEL2 = H
(Pin 14)
22.5792
48.0000
36.0000
45.0000
48.6000
L
48.0000
36.0000
45.0000
48.6000
22.5792
L
36.0000
45.0000
48.6000
L
L
36.0000
45.0000
48.6000
22.5792
48.0000
L
L
L
L
48.0000
L
L
L
22.5792
L
L
L
L
L
L
L
L
L
NIPPON PRECISION CIRCUITS INC.—5