SM5852DS Datasheet, PDF (3/14 Pages) Nippon Precision Circuits Inc – Digital Audio Processor LSI

SM5852DS
PIN DESCRIPTION
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Name
LRCI
BCKI
DI
CLK
VSS
RSTN
TESTN
MUTEN
DOUT
BCKO
LRCO
VDD
OPT
MOD1
MOD2
DB/DS
I/O¹
Description
Ip
Input data sample rate (fs) clock input
Ip
Bit clock input
Ip
Serial data input
I
Clock input
–
Ground
Ip
System reset initialization. Reset when LOW.
Ip
Test mode input. Testing when LOW.
Ip
Mute input. Muting when LOW.
O
Serial data output
O
Bit clock output
O
Output data sample rate (fs) clock output
–
3.2 to 5.5 V supply
Ip
ASC ON/OFF switch control. OFF when HIGH, and ON when LOW.
Ip
XBS/LIVE low-pass gain select inputs.The XBS/LIVE function is bypassed when both MOD1
Ip
and MOD2 are HIGH.
Ip
LIVE ON/OFF switch control. OFF when HIGH, and ON when LOW.The LIVE function is
bypassed when both MOD1 and MOD2 are HIGH.
1. Ip = Input pin with pull-up resistor. Accordingly, they can be left open for HIGH-level input.
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