SM5843A Datasheet, PDF (21/24 Pages) Nippon Precision Circuits Inc – Audio Multi-function Digital Filter

SM5843A×1
Data Input to Output Delay Timing
This is the digital filter arithmetic computation time
from the completion of data input at rate fs (t_INPUT)
on the rising edge of LRCI to the start of data output
at rate 8fs (t_OUTPUT) on the falling edge of WCKO.
Filter response
Filter response 1
Filter response 2
CKSLN
LOW (256fs)
HIGH (384fs)
LOW (256fs)
HIGH (384fs)
SYNCN
LOW
HIGH
LOW
HIGH
LOW
HIGH
LOW
HIGH
Mode
After reset + sync mode
Jitter-free mode
After reset + sync mode
Jitter-free mode
After reset + sync mode
Jitter-free mode
After reset + sync mode
Jitter-free mode
t_OUTPUT − t_INPUT
44.625/fs
44.25/fs − 45.0/fs
44.75/fs
44.375/fs − 45.125/fs
25.625/fs
25.25/fs − 26.0/fs
25.75/fs
25.375/fs − 26.125/fs
1/fs
LRCI
Serial data Input
44/fs(Filter Response 1)
25/fs(Filter Response 2)
tINPUT
WCKO
(256fs)
WCKO
(384fs)
tOUTPUT ^{Serial data output}
tOUTPUT ^{Serial data output}
Figure 12. Delay timing (SYNCN = LOW)
tINPUT
44.625/fs (Filter Response 1)
25.625/fs (Filter Response 2)
tOUTPUT
tINPUT
tOUTPUT
Figure 13. Delay timing (SYNCN = CKSLN = LOW)
NIPPON PRECISION CIRCUITS—21