SM5843A Datasheet, PDF (16/24 Pages) Nippon Precision Circuits Inc – Audio Multi-function Digital Filter

SM5843A×1
Attenuation operation
When an attenuation value DATT is set, the attenua-
tion changes smoothly from the current attenuation
level to the new level. The new attenuation data is
stored in the attenuation register while the current
attenuation data is stored in a temporary register. The
attenuation then changes smoothly by ramping
between the two register values, updating the tempo-
rary register with each step. If a new attenuation
value for DATT is set before the previous target
attenuation level is reached, the attenuation then
ramps toward the new attenuation level.
When MUTE is HIGH, the attenuation level is −∞.
When MUTE goes LOW (muting OFF), the attenua-
tion level returns to that of the original value of
DATT.
Setting1
DATT1
(Gain)
−∞
DATT2
Setting2
MUTE
L
H
Setting4
DATT2
DATT4
DATT3
Setting3
L
Time
Figure 4. Attenuation and mute timing
System Clock (XTI, XTO, CKO, CKSLN)
Two system clock frequencies, 384fs and 256fs, can
be used. An external clock source can be input on
XTI, or a crystal oscillator can be constructed by
connecting a crystal between XTI and XTO. The
system clock is also buffered and then output on
CKO. The system clock frequency selection and the
internal clock frequency are shown in the following
table.
Parameter
XTI input clock frequency (f_XI = 1/t_XI)
CKO clock frequency
Internal clock frequency (t_SYS)
CKSL
HIGH LOW
384fs 256fs
384fs 256fs
2 × t_XI
t_XI
CKSLN
XTI
XTO
CKO
to timing controller
1/2
Internal system clock
(192fs or 256fs)
Figure 5. Clock generator circuit
NIPPON PRECISION CIRCUITS—16