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SM5950AM Datasheet, PDF (15/20 Pages) Nippon Precision Circuits Inc – Asynchronous Sample Rate Converter
SM5950AM
Group Delay Time
If tINPUT and tOUTPUT are defined as:
tINPUT : Serial input data (fsi rate) read end timing (LRCI clock rising edge)
tOUTPUT : Serial output data (fso rate) output start timing (LRCO clock rising edge)
the group delay is given by:
tOUTPUT – tINPUT = (48.41 ± 8.41)/fsi
1/fs
Serial data input
tINPUT
1/fso
Data waveform image
(48.41 ± 8.41)/fsi
Serial data output
t OUTPUT
tINPUT
t OUTPUT – tINPUT
t OUTPUT
Response Time
The conversion rate detector stage requires a certain amount of time to calculate the sample rate conversion
ratio with accuracy. The minimum response time, after the SM5950AM input sampling frequency (fsi: LRCI
input) and output sampling frequency (fso: derived from SCKO) have stabilized sufficiently, is the time
required to determine the sample rate conversion ratio to 16-bit accuracy after reset is cleared, and is given by:
Response time = 16384/fso (371ms at fso = 44.1kHz)
NIPPON PRECISION CIRCUITS INC.—15