SM5901AF Datasheet, PDF (1/31 Pages) Nippon Precision Circuits Inc – compression and non compression type anti-shock memory controller with built-in 1M DRAM

NIPPON PRECISION CIRCUITS INC.
SM5901AF
compression and non compression type anti-shock
memory controller with built-in 1M DRAM
Overview
The SM5901 is a compression and non compres-
sion type anti-shock memory controller with built-in
1M DRAM LSI for compact disc players. The com-
pression level can be set in 4 levels, and external
1M DRAM can be connected to expand the memo-
ry to 2M bits. Digital attenuator, soft mute and relat-
ed functions are also incorporated. It operates from
a 2.7 to 3.3 V wide supply voltage range.
Features
- 2-channel processing
- Serial data input
•2s complement, 16-bit/MSB first, rear-packed
format
- System clock input
•384fs (16.9344 MHz)
- Anti-shock memory controller
- ADPCM compression method
•4-level compression mode selectable
4-bit compression mode 2.78 s/Mbit
5-bit compression mode 2.22 s/Mbit
6-bit compression mode 1.85 s/Mbit
Full-bit non compression mode 0.70 s/Mbit
•External memory can be connected
2×1M DRAM (256K×4 bits)
Internal and external 1M DRAMs
1×1M DRAM (256K×4 bits)
Only internal 1M DRAM
- Compression mode selectable
- Microcontroller interface
•Serial command write and state read-out
•Data residual quantity detector:
15-bit operation, 16-bit output
•Digital attenuator
Full-bit setting
•Soft attenuator function
Noiseless attenuation-level switching
(256- step switching in 23 ms max.)
•Soft mute function
Mute ON in 23 ms max.
Direct return after soft mute release
•Forced mute
- Extension I/O
Microcontroller interface for external control
using 5 extension I/O pins
- +2.7 to +3.3 V wide operating voltage range
- Schmitt inputs
All input pins (including I/O pins) except CLK
(system clock)
- Reset signal noise elimination
Approximately 3.8 µs or longer (65 system
clock pulses) continuous LOW-level reset
- 44-pin QFP package (0.8 mm pin pitch)