English
Language : 

U401 Datasheet, PDF (2/2 Pages) Calogic, LLC – Dual N-Channel JFET Switch
U401 - U406
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified)
SYMBOL
BVcss
IGSS
VGS(off)
VGS(on)
loss
IG
BVG1-G2
gfs
gos
gfs
9os
Ciss
Crss
en
CMRR
I VGSI -Vos2 1
1 AVGSi -VGS2 I
AT
PARAMETER
U401
U402
U403
U404
U405
U406
UNITS
MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX
TEST CONDITIONS
Gate-Source
Breakdown Voltage
-50
-50
-50
-50
-50
-50
V Vos=0, lo = -1(iA
Gate Reverse Current
(Note 2)
-25
-25
-25
-25
-25
-25 PA Vos=0, VGs=-30V
Gate-Source Cutoff
Voltage
Gate-Source Voltage
(on)
-.5 -2.5 -.5 -2.5 -.5 -2.5 -.5 -2.5 -.5 -2.5 -.5 -2.5
-2.3
-2.3
-2.3
-2.3
-2.3
-2.3
Vos=15V, !D=1nA
V
VDG = 15V, lo = 200uA
Saturation Drain
Current (Note 3)
0.5 10.0 0.5 10.0 0.5 10.0 0.5 10.0 0.5 10.0 0.5 10.0 mA Vos=10V, VQS = 0
Operating Gate
Current (Note 2)
-15
-15
-15
-15
-15
-15 PA VDG= 15V, I3 = 200uA
-10
-10
-10
-10
-10
-10 nA
TA=125°C
Gate-Gate
Breakdown Voltage
±50
±50
±50
±50
±50
±50
V Vos=0, VGS=O,
lo=±1(iA
Common-Source
Forward
Transconductance
(Note 3)
Common-Source
Output Conductance
2000 7000 2000 7000 2000 7000 2000 7000 2000 7000 2000 7000
20
20
20
20
20
20
VDS= 10V,
VGs=0
f = 1kHz
uS
Common-Source
Forward
Transconductance
Common-Source
Output Conductance
1000 2000 1000 2000 1000 2000 1000 2000 1000 2000 1000 2000
2.0
2.0
2.0
2.0
2.0
2.0
f = 1kHz
VDG= 15V,
ID = 200|JA
Common-Source
Input Capacitance
(Note 6)
Common-Source
Reverse Transfer
Capacitance (Note 6)
8.0
8.0
8.0
8.0
8.0
8.0
PF
3.0
3.0
3.0
3.0
3.0
3.0
Equivalent
Short-Circuit Input
Noise Voltage
20
20
20
20
20
20
nV VDs=15V, f = 10Hz
VRT Vos=0 (Note 6)
Common-Mode
Rejection Ratio
95
95
95
95
90
dB VDG= 10 to 20V,
ID = 200uA (Note 5, 6)
Differential
Gate-Source Voltage
5
10
10
15
20
40 mV VDG = 10V, lD = 200uA
Gate-Source Voltage
Differential Drift (Note
4)
10
10
25
25
40
80
uV/°C
VDG= 10V,
ID = 200nA
TA = -55°C
TB = +25°C
TC = +125°C
NOTES: 1. Per transistor.
2. Approximately doubles for every 10°C increase in TA.
3. Pulse test duration = 300ns; duty cycle <3%.
4. Measured at end points TA, TB, Tc.
5. CMRR = 20 logic . ,,,AVD°,.. , I, AVoo = 10V.
_ | VGS1 -VGS21 _
6. For design reference only, not 100%"tested.