BUK553-60A Datasheet, PDF (1/2 Pages) NXP Semiconductors – PowerMOS transistor Logic level FET

^Emi-L-onaucioi U-^
20 STERNAVE.
SPRINGFIELD, NEW JERSEY 07081
U.S.A.
, One.
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PowerMOS transistor
Logic level FET
BUK553-60A/B
GENERAL DESCRIPTION
N-channel enhancement mode
logic level field-effect power
transistor in a plastic envelope.
The device is intended for use in
Switched Mode Power Supplies
(SMPS), motor control, welding,
DC/DC and AC/DC converters, and
in automotive and general purpose
switching applications.
PINNING - T0220AB
PIN
DESCRIPTION
1 gate
2 drain
3 source
tab drain
QUICK REFERENCE DATA
SYMBOL PARAMETER
VDS
ID
™DS(ON)
BUK553
Drain-source voltage
Drain current (DC)
Total power dissipation
Junction temperature
Drain-source on-state
resistance;
Ves = 5 V
MAX.
-60A
60
21
75
175
0.085
PIN CONFIGURATION
SYMBOL
MAX.
-60B
60
20
75
175
0.10
UNIT
V
A
W
'C
Q
1 23
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
MIN.
VDS
VDGR
±VGs
+VQSM
Drain-source voltage
Drain-gate voltage
RGS = 20 kQ
Gate-source voltage
Non-repetitive gate-source voltage tp<50ns
ID
Drain current (DC)
Tmb = 25 'C
ID
Drain current (DC)
Tmb = 100-C
I DM
Drain current (pulse peak value) Tmb= 25 'C
"tot
Total power dissipation
Storage temperature
Junction Temperature
Tmb = 25 'C
-55
*•
THERMAL RESISTANCES
SYMBOL PARAMETER
"th j-mb
R|hj-a
Thermal resistance junction to
mounting base
Thermal resistance junction to
ambient
CONDITIONS
MAX.
60
60
15
20
-60A
21
15
84
-60B
20
14
80
75
175
175
UNIT
V
V
V
V
A
A
A
W
*_•C_c
MIN. TYP. MAX. UNIT
2.0 K/W
-
60
K/W