UPD30181 Datasheet, PDF(62/444 Page) NEC – 64-/32-Bit Microprocessor

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UPD30181 Datasheet, PDF (62/444 Pages) NEC – 64-/32-Bit Microprocessor

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CHAPTER 2 PIN FUNCTIONS

Signal Name

RxD1/GPIO25

TxD1/GPIO26/CLKSEL0

RTS1#/GPIO27/CLKSEL1

CTS1#/GPIO28

DCD1#/GPIO29

DTR1#/GPIO30/CLKSEL2

DSR1#/GPIO31

IRDIN/RxD2

IRDOUT/TxD2

GPIO(15:14)/FPD(7:6)/

CD(2:1)#

GPIO(13:12)/FPD(5:4)

GPIO11/PCS1#

GPIO10/FRM/SYSCLK

During RTC

Reset

â

Note 3

Note 3

â

â

Note 3

â

â

Hi-Z

â

â

â /Hi-Z

â /Hi-Z

After RTC Reset

Hi-Z

Hi-Z

Hi-Z

Hi-Z

Hi-Z

Hi-Z

Hi-Z

â

Hi-Z

Hi-Z

Hi-Z

Hi-Z

Hi-Z

After Reset by

Deadmanâs

Switch or

RSTSW

Hi-Z

Hi-Z

Hi-Z

Hi-Z

Hi-Z

Hi-Z

Hi-Z

â

1

Hi-Z

Hi-Z

Hi-Z/1

Hi-Z

During Suspend

Mode

Note 1

Note 1

Note 1

Note 1

Note 1

Note 1

Note 1

â

Note 1

Note 1/0/

Note 1

Note 1/0

Note 1/1

Note 1/0

GPIO9/CTS2#

â

Hi-Z

Hi-Z

Note 1

GPIO8/DSR2#

â

Hi-Z

Hi-Z

Note 1

GPIO7/DTR2#

â

Hi-Z

Hi-Z

Note 1

GPIO6/RTS2#

â

Hi-Z

Hi-Z

Note 1

GPIO5/DCD2#

â

Hi-Z

Hi-Z

Note 1

GPIO4

â

Hi-Z

Hi-Z

Note 1

GPIO3/PCS0#

â /Hi-Z

Hi-Z

Hi-Z/1

Note 1/1

GPIO2/SCK

â

Hi-Z

Hi-Z

Note 1

GPIO1/SO

â

Hi-Z

Hi-Z

Note 1

GPIO0/SI

â

Hi-Z

Hi-Z

Note 1

LEDOUT

Hi-Z

1

Note 1

Note 1

Notes1. Maintains the state of previous Fullspeed mode.

2. The state depends on the GPHIBSTH/GPHIBSTL register setting.

3. The input level is sampled to determine the CPU core operation frequency.

(3/3)

During

Hibernate Mode

or Shutdown by

HALTimer

Note 1/Note 2

Note 1/Note 2

Note 1/Note 2

Note 1/Note 2

Note 1/Note 2

Note 1/Note 2

Note 1/Note 2

â

Hi-Z

Note 2/Note 1

Note 2/Note 1

Note 2/Hi-Z

Note 2/Note 1/

Hi-Z

Note 2/Note 1

Note 2/Note 1

Note 2/Note 1

Note 2/Note 1

Note 2/Note 1

Note 2

Note 2/Hi-Z

Note 2/Note 1

Note 2/Note 1

Note 2/Note 1

Note 1

Remark 0: low level, 1: high level, Hi-Z: high impedance

62

Userâs Manual U14272EJ3V0UM

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