UPD30181 Datasheet, PDF (21/444 Pages) NEC – 64-/32-Bit Microprocessor

17.4.13 SYSMEMSLnREG (Index: 0x10, 0x18, 0x20, 0x28, 0x30) ...................................................... 344
17.4.14 MEMWIDn_REG (Index: 0x11, 0x19, 0x21, 0x29, 0x31) ........................................................ 344
17.4.15 SYSMEMELnREG (Index: 0x12, 0x1A, 0x22, 0x2A, 0x32) ..................................................... 345
17.4.16 MEMSELn_REG (Index: 0x13, 0x1B, 0x23, 0x2B, 0x33) ........................................................ 345
17.4.17 MEMOFFLnREG (Index: 0x14, 0x1C, 0x24, 0x2C, 0x34) ....................................................... 346
17.4.18 MEMOFFHnREG (Index: 0x15, 0x1D, 0x25, 0x2D, 0x35) ...................................................... 346
17.4.19 DTGENCLREG (Index: 0x16) .................................................................................................. 347
17.4.20 GLOCTRLREG (Index: 0x1E) ................................................................................................. 348
17.4.21 VOLTSENREG (Index: 0x1F) .................................................................................................. 348
17.4.22 VOLTSELREG (Index: 0x2F) .................................................................................................. 349
17.5 Memory Mapping of CompactFlash Card ............................................................................ 350
17.6 Controlling Bus When CompactFlash Card Is Used .......................................................... 352
17.6.1 Controlling bus size ................................................................................................................... 352
17.6.2 Controlling wait .......................................................................................................................... 352
CHAPTER 18 LED CONTROL UNIT (LED) ...................................................................................... 353
18.1 General ................................................................................................................................... 353
18.2 Register Set ............................................................................................................................ 353
18.2.1 LEDHTSREG (0x0B00 0240) .................................................................................................... 354
18.2.2 LEDLTSREG (0x0B00 0242) ..................................................................................................... 355
18.2.3 LEDCNTREG (0x0B00 0248) .................................................................................................... 356
18.2.4 LEDASTCREG (0x0B00 024A) ................................................................................................. 357
18.2.5 LEDINTREG (0x0B00 024C) ..................................................................................................... 358
18.3 Operation Flow ....................................................................................................................... 359
CHAPTER 19 SERIAL INTERFACE UNIT 1 (SIU1) ........................................................................ 360
19.1 General ................................................................................................................................... 360
19.2 Clock Control Logic ............................................................................................................... 360
19.3 Register Set ............................................................................................................................ 361
19.3.1 SIURB_1 (0x0C00 0010: LCR7 = 0, Read) ............................................................................... 362
19.3.2 SIUTH_1 (0x0C00 0010: LCR7 = 0, Write) ............................................................................... 362
19.3.3 SIUDLL_1 (0x0C00 0010: LCR7 = 1) ........................................................................................ 362
19.3.4 SIUIE_1 (0x0C00 0011: LCR7 = 0) ........................................................................................... 363
19.3.5 SIUDLM_1 (0x0C00 0011: LCR7 = 1) ....................................................................................... 364
19.3.6 SIUIID_1 (0x0C00 0012: Read) ................................................................................................ 366
19.3.7 SIUFC_1 (0x0C00 0012: Write) ................................................................................................ 368
19.3.8 SIULC_1 (0x0C00 0013) ........................................................................................................... 371
19.3.9 SIUMC_1 (0x0C00 0014) .......................................................................................................... 372
19.3.10 SIULS_1 (0x0C00 0015) ......................................................................................................... 373
19.3.11 SIUMS_1 (0x0C00 0016) ........................................................................................................ 375
19.3.12 SIUSC_1 (0x0C00 0017) ......................................................................................................... 376
19.3.13 SIURESET_1 (0x0C00 0019) .................................................................................................. 376
19.3.14 SIUACTMSK_1 (0x0C00 001C) .............................................................................................. 377
19.3.15 SIUACTTMR_1 (0x0C00 001E) .............................................................................................. 378
User’s Manual U14272EJ3V0UM
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