UPD753012 Datasheet, PDF (60/80 Pages) NEC – 4-BIT SINGLE-CHIP MICROCONTROLLER

µPD753012, 753016, 753017
DC Characteristics (TA = –40 to +85 ˚C, VDD = 2.2 to 5.5 V)
Parameter
LCD drive voltage
LCD divider
resistor^{Note 1}
LCD output voltage
deviation^{Note 2}
(common)
LCD output voltage
deviation^{Note 2}
(segment)
Supply current^{Note 3}
Symbol
VLCD
RLCD1
RLCD2
VODC
VODS
IO = ±5µA
IO = ±1µA
Conditions
VLCD0 = VLCD
VLCD1 = VLCD × 2/3
VLCD2 = VLCD × 1/3
2.2 V ≤ VLCD ≤ VDD
IDD1
6.00 MHz^{Note 4} VDD = 5.0 V ± 10 %^{Note 5}
crystal
oscillation
VDD = 3.0 V ± 10 %^{Note 6}
IDD2
C1 = C2
HALT
VDD = 5.0 V ± 10 %
= 22 pF
mode
VDD = 3.0 V ± 10 %
IDD1
4.19 MHz^{Note 4} VDD = 5.0 V ± 10 %^{Note 5}
crystal
oscillation
VDD = 3.0 V ± 10 %^{Note 6}
IDD2
C1 = C2
HALT
VDD = 5.0 V ± 10 %
= 22 pF
mode
VDD = 3.0 V ± 10 %
IDD3
32.768
Low-
VDD = 3.0 V ± 10 %
kHz^{Note 7}
voltage
VDD = 2.5 V ± 10 %
crystal
mode^{Note 8} VDD = 3.0 V, TA = 25 ˚C
oscillation
Low current
dissipation
mode^{Note 9}
VDD = 3.0 V ± 10 %
VDD = 3.0 V, TA = 25 ˚C
IDD4
HALT
Low-
VDD = 3.0 V ± 10 %
mode
voltage
VDD = 2.5 V ± 10 %
mode^{Note 8} VDD = 3.0 V, TA = 25 ˚C
Low power
dissipation
mode^{Note 9}
VDD = 3.0 V ± 10 %
VDD = 3.0 V, TA = 25 ˚C
IDD5
XT1 = 0 V VDD = 5.0 V ± 10 %
STOP
VDD = 3.0 V ± 10 %
mode^{Note 10}
TA = 25 ˚C
MIN.
2.2
50
5
0
0
TYP.
100
10
MAX.
VDD
200
20
±0.2
±0.2
1.9
0.4
0.72
0.27
1.5
0.25
0.7
0.23
12
4.5
12
6
6
8.5
3
8.5
3.5
3.5
0.05
0.02
0.02
6.0
1.3
2.1
0.8
4.0
0.75
2.0
0.7
35
12
24
18
12
25
9
17
12
7
10
5
3
Unit
V
kΩ
kΩ
V
V
mA
mA
mA
mA
mA
mA
mA
mA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
Notes 1. Either RLCD1 or RLCD2 can be selected by mask option.
2. Voltage deviation is the difference between the ideal values (VLCDn; n = 0, 1, 2) of the segment and
common outputs and the output voltage.
3. The current flowing through the internal pull-up resistor and the LCD split resistor is not included.
4. Including the case when the subsystem clock oscillates.
5. When the device operates in high-speed mode with the processor clock control register (PCC) set to
0011.
6. When the device operates in low-speed mode with PCC set to 0000.
7. When the device operates on the subsystem clock, with the system clock control register (SCC) set
to 1001 and oscillation of the main system clock stopped.
8. When 0000 is assigned to the sub-oscillator control register (SOS).
9. When 0010 is assigned to the SOS.
10. When the sub-oscillator feedback resistor is not used with the SOS set to 00X1 (X: don’t care).
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