UPD780828A Datasheet, PDF (53/472 Pages) NEC – 8-bit Single-Chip Microcontroller

Chapter 3 CPU Architecture
The memory map of the µPD780828A is shown in Figure 3-3.
Figure 3-3: Memory Map of the µPD780828A
FFFFH
FF20H
FF1FH
FF00H
FEFFH
FEE0H
FEDFH
FE20H
FB00H
FAFFH
FA80H
FA7FH
FA64H
FA63H
Special Function Register
(SFR) 256 x 8 bits
General Registers
32 x 8 bits
Internal High-speed RAM
1024 x 8 bits
Not usable
LCD Display RAM
28 x 4 bits
Not usable
F7E0H
F7DFH
F600H
F5FFH
F400H
F3FFH
F000H
EFFFH
0000H
Expansion RAM
480 Bytes
(shared with DCAN)
Expansion RAM
512 Bytes
Expansion RAM
1024 Bytes
Internal ROM
60 Kbytes
EFFFH
1000H
0FFFH
0800H
07FFH
0080H
007FH
0040H
003FH
0000H
Program Area
CALLF Entry Area
Program Area
CALLT Table Area
Vector Table Area
Notes: 1. In the expansion RAM between F000H and F3FFH it is possible to do code execution.
2. In the expansion RAM between F400H and F7DFH it is not possible to do code execution.
User’s Manual U16504EE1V1UD00
53