UPD780828A Datasheet, PDF (359/472 Pages) NEC – 8-bit Single-Chip Microcontroller

Chapter 20 Interrupt Functions
(4) External interrupt rising edge enable register (EGP), external interrupt falling edge enable
register (EGN)
EGP and EGN specify the valid edge to be detected on pins P00 to P02.
EGP and EGN can be read or written to with a 1-bit or 8-bit memory manipulation instruction.
These registers are set to 00H when the RESET signal is output.
Figure 20-5: Formats of External Interrupt Rising Edge Enable Register
and External Interrupt Falling Edge Enable Register
Symbol 7
6
5
4
3
2
1
0 Address After Reset R/W
EGP
0
0
0
0
0 EGP2 EGP1 EGP0 FF48H
00H R/W
Symbol 7
6
5
4
3
2
1
0 Address After Reset R/W
EGN
0
0
0
0
0 EGN2 EGN1 EGN0 FF49H
00H R/W
EGPn
0
0
1
1
EGNn
0
1
0
1
Valid edge of INTPn pin (n = 0 - 2)
Interrupt disable
Falling edge
Rising edge
Both rising and falling edges
User’s Manual U16504EE1V1UD00
359