UPD70F3102-33 Datasheet, PDF (27/82 Pages) NEC – 32-/16-BIT SINGLE-CHIP MICROCONTROLLER

µPD70F3102-33
AC Characteristics (TA = –40 to +85°C, VDD = CVDD = 3.0 to 3.6 V, HVDD = 5.0 V ±10%, VSS = 0 V, Output Pin
Load Capacitance: CL = 50 pF)
AC Test Input Waveforms
(a) P04/INTP100/DMARQ0 to P07/INTP103/DMARQ3, P14/INTP110/DMAAK0 to P17/INTP113/DMAAK3,
P34/INTP130, P35/INTP131/SO2, P36/INTP132/SI2, P37/INTP133/SCK2, P104/INTP120/TC0 to
P107/INTP123/TC3, P114/INTP140, P115/INTP141/SO3, P116/INTP142/SI3, P117/INTP143/SCK3,
P124/INTP150 to P126/INTP152, P127/INTP153/ADTRG, P02/TCLR10, P12/TCLR11, P32/TCLR13,
P102/TCLR12, P112/TCLR14, P122/TCLR15, P03/TI10, P13/TI11, P33/TI13, P103/TI12, P113/TI14,
P123/TI15, P20/NMI, P23/RXD0/SI0, P24/SCK0, P26/RXD1/SI1, P27/SCK1, MODE0 to MODE2, RESET
HVDD
Input signal
0V
0.8HVDD
0.2HVDD
Measurement
points
0.8HVDD
0.2HVDD
(b) Other than (a)
2.4 V
Input signal
0.4 V
2.2 V
0.8 V
Measurement
points
2.2 V
0.8 V
AC Test Output Measurement Points
Output signal
2.4 V
0.8 V
Measurement
points
2.4 V
0.8 V
Load Conditions
DUT
(Device under test)
CL = 50 pF
Caution If the load capacitance exceeds 50 pF due to the circuit configuration, reduce the load
capacitance of the device to 50 pF or less by inserting a buffer or by some other means.
Preliminary Data Sheet U13844EJ2V0DS00
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