UPD75P336 Datasheet, PDF (22/56 Pages) NEC – 4-BIT SINGLE-CHIP MICROCOMPUTER

µPD75P336
Mne-
monic
Operand
Operation
Address-
Skip Condition
ing Area
mem.bit
2 2 (mem.bit) ← 1
*3
SET1 fmem.bit
2 2 (fmem.bit) ← 1
*4
pmem.@L
2
2 (pmem7–2 + L3–2.bit (L1–0)) ← 1
*5
@H + mem.bit
2
2 (H + mem3–0.bit) ← 1
*1
mem.bit
2 2 (mem.bit) ← 0
*3
CLR1 fmem.bit
2 2 (fmem.bit) ← 0
*4
pmem.@L
2
2 (pmem7–2 + L3–2.bit (L1–0)) ← 0
*5
@H + mem.bit
2
2 (H + mem3–0.bit) ← 0
*1
mem.bit
2 2 + S Skip if (mem.bit) = 1
*3 (mem.bit) = 1
SKT
fmem.bit
2 2 + S Skip if (fmem.bit) = 1
*4 (fmem.bit) = 1
pmem.@L
2 2 + S Skip if (pmem7–2 + L3–2.bit (L1–0)) = 1
*5 (pmem.@L) = 1
@H + mem.bit 2 2 + S Skip if (H + mem3–0.bit) = 1
*1
(@H + mem.bit) = 1
mem.bit
2 2 + S Skip if (mem.bit) = 0
*3 (mem.bit) = 0
SKF
fmem.bit
2 2 + S Skip if (fmem.bit) = 0
*4 (fmem.bit) = 0
pmem.@L
2 2 + S Skip if (pmem7–2 + L3–2.bit (L1–0))= 0
*5 (pmem.@L) = 0
@H + mem.bit 2 2 + S Skip if (H + mem3–0.bit) = 0
*1
(@H + mem.bit) = 0
fmem.bit
2 2 + S Skip if (fmem.bit) = 1 and clear
*4 (fmem.bit) = 1
SKTCLR pmem.@L
2 2 + S Skip if (pmem7–2 + L3–2.bit (L1–0)) = 1 and clear
*5 (pmem.@L) = 1
AND1
OR1
XOR1
@H+mem.bit
2 2 + S Skip if (H + mem3–0.bit) = 1 and clear
CY, fmem.bit
2 2 CY ← CY ∧ (fmem.bit)
CY, pmem.@L
2
2 CY ← CY ∧ (pmem7–2 + L3–2.bit (L1–0))
CY, @H + mem.bit 2
2 CY ← CY ∧ (H + mem3-0.bit)
CY, fmem.bit
2 2 CY ← CY ∨ (fmem.bit)
CY, pmem.@L
2
2 CY ← CY ∨ (pmem7–2 + L3–2.bit (L1–0))
CY, @H + mem.bit 2
2 CY ← CY ∨ (H + mem3-0.bit)
CY, fmem.bit
2 2 CY ← CY ∨ (fmem.bit)
CY, pmem.@L
2
2 CY ← CY ∨ (pmem7–2 + L3–2.bit (L1–0))
CY, @H + mem.bit 2
2 CY ← CY ∨ (H + mem3-0.bit)
*1
(@H + mem.bit) = 1
*4
*5
*1
*4
*5
*1
*4
*5
*1
BR
addr
PC13–0 ← addr
— — ^{(The assembler selects the optimum instruction}
*6
from among the BRCB !caddr, and BR $addr
instructions.)
BR
!addr
3
3 PC13–0 ← addr
*6
BRCB !caddr
2
2
PC13–0 ← PC 13.12 + caddr11–0
*8
BR
$addr
1
2 PC13–0 ← addr
*7
PCDE
BR
PCXA
2
3
PC13–0 ← PC 13-8 + DE
2
3
PC13–0 ← PC 13-8 + XA
Note Instruction Group
22