UPD17P133 Datasheet, PDF (219/289 Pages) NEC – 4-BIT SINGLE-CHIP MICROCONTROLLER

CHAPTER 18 INSTRUCTION SET
SET1
SUB
IXE
; IXE flag ← 1
MEM003, MEM02F ; IX
00001000000B (0.40H)
; Bank operand OR) 00000101111B (0.2FH)
; Specified address 00001101111B (0.6FH)
Example 4
Subtracts the address 0.3FH contents from the address 0.03H contents and stores the result in address
0.03H. At this time, data memory address 0.3FH can be specified by selecting data memory address 2FH,
if IXE=1, IXH=0, IXM=1, and IXL=0, i.e., IX=0.10H.
(0.03H) ← (0.03H) + (0.3FH)
MEM003 MEM 0.03H
MEM02F MEM 0.2FH
MOV BANK, #00H
; Data memory bank 0
MOV RPH, #00H
; General register bank 0
MOV RPL, #00H
; General register row address 0
MOV IXH, #00H
; IX ← 00000010000B (0.10H)
MOV IXM, #01H
;
MOV IXL, #00H
;
SET1 IXE
; IXE flag ← 1
SUB MEM003, MEM02F ; IX
00000010000B (0.10H)
; Bank operand OR) 00000101111B (0.2FH)
; Specified address 00000111111B (0.3FH)
<4> Note
The first operand for the SUB r, m instruction must be a general register address. Therefore, if the instruction
is described as follows, address 03H is specified as a register:
MEM013 MEM 0.13H
MEM02F MEM 0.2FH
SUB MEM013, MEM02F
General register address must be in 00H-0FH range
(set register pointer row address other than 1).
When the CMP flag=1, the subtraction result is not stored.
When the BCD flag=1, the BCD result is stored.
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