UPD17P133 Datasheet, PDF (171/289 Pages) NEC – 4-BIT SINGLE-CHIP MICROCONTROLLER

CHAPTER 14 INTERRUPT FUNCTIONS
Figure 14-4. Interrupt Acceptance Timing Chart (when INTE=1, IP×××=1) (2/3)
<4> When an interrupt has occurred before M2 of a MOVT instruction
Machine cycle M0 M1 M2 M3 M0 M1 M2 M3 M0 M1 M2 M3 M0 M1
Instruction
IRQ×××
MOVT instruction
Interrupt occurrence recognized
INT cycle
Vector address
instruction
<5> When an interrupt has occurred before M2' of a MOVT instruction
Machine cycle M0 M1 M2 M3 M0 M1 M2 M3 M0 M1 M2 M3 M0 M1
Instruction
IRQ×××
MOVT instruction
INT cycle
Interrupt occurrence recognized
Vector address
instruction
<6> When an interrupt has occurred before M2 of an EI instruction
Machine cycle M0 M1 M2 M3 M0 M1 M2 M3 M0 M1 M2 M3 M0 M1
Instruction
IRQ×××
EI instruction
An instruction other than MOVT or EI
Interrupt occurrence recognized
INT cycle
Vector address
instruction
<7> When an interrupt has occurred after M2 of an EI instruction
Machine cycle M0 M1 M2 M3 M0 M1 M2 M3 M0 M1 M2 M3 M0 M1
Instruction
IRQ×××
EI instruction
An instruction other than MOVT or EI
INT cycle
Interrupt occurrence recognized
Vector address
instruction
156